MC68HC908LK24CFU Freescale Semiconductor, MC68HC908LK24CFU Datasheet - Page 244
![no-image](/images/manufacturer_photos/0/2/262/freescale_semiconductor_sml.jpg)
MC68HC908LK24CFU
Manufacturer Part Number
MC68HC908LK24CFU
Description
IC MCU 24K FLASH 8MHZ SPI 64-QFP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet
1.MC908LK24CFUE.pdf
(464 pages)
Specifications of MC68HC908LK24CFU
Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
I²C, IRSCI, SPI
Peripherals
LCD, LVD, POR, PWM
Number Of I /o
40
Program Memory Size
24KB (24K x 8)
Program Memory Type
FLASH
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 6x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MC68HC908LK24CFU
Manufacturer:
FREESCALE Semiconductor
Quantity:
489
Company:
Part Number:
MC68HC908LK24CFU
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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Real Time Clock (RTC)
12.10.13 Day-Of-Week Register (DOWR)
12.10.14 Chronograph Data Register (CHRR)
Data Sheet
244
NOTE:
This register is write-protected; unprotect by a write sequence to RTCWE[1:0] in RTCCOMR.
Address:
Address:
This read/write register contains the current value of the day-of-week
counter. This register can be read at any time without affecting the
counter count. Writing to this register loads the value to the day-of-week
counter and the counter continues to count from this new value.
The day-of-week counter value rolls over to 0 ($00) after reaching 6
($06). Writing a value other than 0 to 6 to this register has no effect.
This read-only chronograph data register contains the value in the
chronograph counter. Reset clears the chronograph data register.
Setting the chronograph counter reset bit (CHRCLR) also clears the
chronograph data register.
The chronograph data register has a resolution of 1/100 seconds. The
chronograph counter value rolls over to $00 after reaching $63.
The chronograph counter is not synchronized to the compensated RTC
1-Hz clock. Hence, chronograph ticks may not align with the RTC clock
and calendar register updates.
Reset:
Reset:
Read:
Write:
Read:
Write:
$004D
$004E
Figure 12-20. Chronograph Data Register (CHRR)
0
0
0
0
Figure 12-19. Day-Of-Week Register (DOWR)
Real Time Clock (RTC)
= Unimplemented
= Unimplemented
CHR6
0
0
0
CHR5
0
0
0
CHR4
0
0
0
CHR3
MC68HC908LJ24/LK24 — Rev. 2.1
0
0
0
DOW2
CHR2
Freescale Semiconductor
U
0
DOW1
CHR1
U
0
DOW0
CHR0
U
0
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