MCF5253VM140J Freescale Semiconductor, MCF5253VM140J Datasheet - Page 21
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MCF5253VM140J
Manufacturer Part Number
MCF5253VM140J
Description
IC MCU 2.1MIPS 140MHZ 225MAPBGA
Manufacturer
Freescale Semiconductor
Series
MCF525xr
Datasheets
1.MCF5253VM140J.pdf
(34 pages)
2.MCF5253VM140J.pdf
(8 pages)
3.MCF5253VM140J.pdf
(648 pages)
4.MCF5253VM140J.pdf
(2 pages)
Specifications of MCF5253VM140J
Core Processor
Coldfire V2
Core Size
32-Bit
Speed
140MHz
Connectivity
CAN, EBI/EMI, I²C, QSPI, UART/USART, USB OTG
Peripherals
DMA, WDT
Program Memory Type
ROMless
Ram Size
128K x 8
Voltage - Supply (vcc/vdd)
1.08 V ~ 1.32 V
Data Converters
A/D 6x12b
Oscillator Type
External
Operating Temperature
-20°C ~ 70°C
Package / Case
225-MAPBGA
Processor Series
MCF525x
Core
ColdFire V2
3rd Party Development Tools
JLINK-CF-BDM26, EWCF
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of I /o
-
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MCF5253VM140J
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
IDE_IORDY/GPIO33
Freescale Semiconductor
IDE_DIOW/GPIO32
IDE_DIOR/GPIO31
BUFENB1/GPIO29
BUFENB2/GPIO30
SDUDQM/GPO53
SDLDQM/GPO52
SDRAS/GPIO59
SDCAS/GPIO39
BCLKE/GPIO63
SDCS0/GPIO60
CS1/QSPICS3/
SDWE/GPIO38
BCLK/GPIO40
TA/GPIO12
CS0/CS4
ATA_D10
ATA_D11
ATA_D12
ATA_D13
ATA_D14
GPIO28
ATA_D0
ATA_D1
ATA_D2
ATA_D3
ATA_D4
ATA_D5
ATA_D6
ATA_D7
ATA_D8
ATA_D9
ATA_A0
ATA_A1
ATA_A2
Name
D27
D28
D29
D30
D31
RW
OE
Drive Type/
Strength
IO / 8 mA
IO / 8 mA
IO / 8 mA
IO / 8 mA
IO / 8 mA
IO / 2 mA
IO / 2 mA
IO / 2 mA
IO / 2 mA
IO / 2 mA
IO / 2 mA
IO / 2 mA
IO / 8 mA
IO / 8 mA
IO / 8 mA
IO / 8 mA
IO / 8 mA
IO / 8 mA
IO / 8 mA
IO / 8 mA
IO / 8 mA
IO / 8 mA
IO / 8 mA
IO / 8 mA
IO / 8 mA
IO / 8 mA
IO / 8 mA
IO / 8 mA
IO / 8 mA
IO / 8 mA
IO / 8 mA
IO / 8 mA
IO / 8 mA
O / 4 mA
O / 4 mA
O / 4 mA
O / 8 mA
O / 8 mA
O / 2 mA
O / 2 mA
O / 2 mA
MCF5253 ColdFire Processor Data Sheet: Technical Data, Rev. 4
Table 19. 225 MAPBGA Pin Assignment (continued)
Load
(pF)
40
40
40
40
40
30
30
30
30
30
30
30
30
30
30
15
20
20
20
20
20
20
20
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
IDE_IORDY
IDE_DIOW
Function
BUFENB1
BUFENB2
IDE_DIOR
SDUDQM
SDLDQM
SDRAS
SDCAS
BCLKE
SDCS0
SDWE
BCLK
CS0
CS1
1st
TA
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
SDRAM Controller
Function
QSPICS3
ATA Interface
Chip Selects
Bus Control
2nd
CS4
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
Pinconfig
Register
Bit
25
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
IO12
IO29
IO30
IO31
IO32
IO33
IO28 Negated
IO40
IO63
IO38 Negated
IO60 Negated
IO59 Negated
IO39 Negated
O52
O53
Pin
GP
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
Negated
Negated
Reset
HI_Z
HI_Z
HI_Z
HI_Z
HI_Z
H
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
Package Information and Pinout
C
B
D
A
C
R
N
P
K
M
P
R
M
B
E
C
A
C
B
A
D
A
B
B
B
A
B
C
A
D
D
B
C
A
A
E
B
4
4
5
4
5
3
J
4
5
5
6
5
4
4
J
3
7
5
6
6
5
7
6
6
6
8
7
8
9
9
F
8
F
9
1
0
1
0
1
0
1
0
1
1
1
1
1
1
1
1
1
2
1
1
1
2
Controlled by CS2 registers
Controlled by CS2 registers
Boot Mode Select:1-CS0; 0-CS4
Notes
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
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