HD64F3694FTV Renesas Electronics America, HD64F3694FTV Datasheet - Page 323
HD64F3694FTV
Manufacturer Part Number
HD64F3694FTV
Description
IC H8/3694F MCU FLASH 48-QFN
Manufacturer
Renesas Electronics America
Series
H8® H8/300H Tinyr
Datasheet
1.HD64F3694GFYV.pdf
(452 pages)
Specifications of HD64F3694FTV
Core Processor
H8/300H
Core Size
16-Bit
Speed
20MHz
Connectivity
I²C, SCI
Peripherals
PWM, WDT
Number Of I /o
29
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
48-QFN
For Use With
R0K436079S000BE - KIT DEV FOR H8/36079 W/COMPILER
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
- Current page: 323 of 452
- Download datasheet (3Mb)
18.3
18.3.1
Figure 18.2 shows the timing of the operation of the power-on reset circuit. As the power-supply
voltage rises, the capacitor which is externally connected to the RES pin is gradually charged via
the on-chip pull-up resistor (typ. 150 k ). Since the state of the RES pin is transmitted within the
chip, the prescaler S and the entire chip are in their reset states. When the level on the RES pin
reaches the specified value, the prescaler S is released from its reset state and it starts counting.
The OVF signal is generated to release the internal reset signal after the prescaler S has counted
131,072 clock ( ) cycles. The noise cancellation circuit of approximately 100 ns is incorporated to
prevent the incorrect operation of the chip by noise on the RES pin.
To achieve stable operation of this LSI, the power supply needs to rise to its full level and settles
within the specified time. The maximum time required for the power supply to rise and settle after
power has been supplied (t
which is connected to RES pin (C
supply voltage, the power supply circuit should be designed to satisfy the following formula.
Note that the power supply voltage (Vcc) must fall below Vpor = 100 mV and rise after charge on
the RES pin is removed. To remove charge on the RES pin, it is recommended that the diode
should be placed near Vcc. If the power supply voltage (Vcc) rises from the point above Vpor, a
power-on reset may not occur.
t
PWON
Operation
Power-On Reset Circuit
(t
(ms)
PWON
90
3000 ms, C
C
PWON
RES
) is determined by the oscillation frequency (f
( F) + 162/f
Section 18 Power-On Reset and Low-Voltage Detection Circuits (Optional)
RES
RES
). If t
0.22 F, and f
PWON
OSC
(MHz)
means the time required to reach 90
OSC
= 10 in 2-MHz to 10-MHz operation)
Rev.5.00 Nov. 02, 2005 Page 293 of 418
OSC
) and capacitance
REJ09B0028-0500
of power
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