MC908GP32CBE Freescale Semiconductor, MC908GP32CBE Datasheet - Page 128

• Manufacturer Part Number: MC908GP32CBE
• Description: IC MCU 32K FLASH 8MHZ 42-SDIP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC908GP32CBE

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: SCI, SPI
• Peripherals: LVD, POR, PWM
• Number Of I /o: 31
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 42-DIP (0.600", 15.24mm)
• Controller Family/series: HC08
• No. Of I/o's: 31
• Ram Memory Size: 512Byte
• Cpu Speed: 8MHz
• No. Of Timers: 1
• Embedded Interface Type: I2C, SCI, SPI
• Rohs Compliant: Yes
• Processor Series: HC08GP
• Core: HC08
• Data Bus Width: 8 bit
• Data Ram Size: 512 B
• Interface Type: SCI, SPI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 33
• Number Of Timers: 4
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• Development Tools By Supplier: FSICEBASE, DEMO908GZ60E, M68CBL05CE, M68EML08GPGTE
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8 bit, 8 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

Input/Output (I/O) Ports
RxD — SCI Receive Data Input
TxD — SCI Transmit Data Output
12.6.2 Data Direction Register E
Data direction register E (DDRE) determines whether each port E pin is an input or an output. Writing a
logic 1 to a DDRE bit enables the output buffer for the corresponding port E pin; a logic 0 disables the
output buffer.
DDRE1 and DDRE0 — Data Direction Register E Bits
Figure 12-19
128
The PTE1/RxD pin is the receive data input for the SCI module. When the enable SCI bit, ENSCI, is
clear, the SCI module is disabled, and the PTE1/RxD pin is available for general-purpose I/O. See
Chapter 13 Serial Communications Interface Module
The PTE0/TxD pin is the transmit data output for the SCI module. When the enable SCI bit, ENSCI, is
clear, the SCI module is disabled, and the PTE0/TxD pin is available for general-purpose I/O. See
Chapter 13 Serial Communications Interface Module
These read/write bits control port E data direction. Reset clears DDRE1 and DDRE0, configuring all
port E pins as inputs.
1 = Corresponding port E pin configured as output
0 = Corresponding port E pin configured as input
shows the port E I/O logic.
Address:
Avoid glitches on port E pins by writing to the port E data register before
changing data direction register E bits from 0 to 1.
Reset:
Read:
Write:
READ DDRE ($000C)
WRITE DDRE ($000C)
WRITE PTE ($0008)
READ PTE ($0008)
$000C
Bit 7
0
0
Figure 12-18. Data Direction Register E (DDRE)
= Unimplemented
6
0
0
RESET
MC68HC908GP32 Data Sheet, Rev. 10
Figure 12-19. Port E I/O Circuit
5
0
0
NOTE
DDREx
PTEx
4
0
0
(SCI).
(SCI).
3
0
0
2
0
0
DDRE1
1
0
Freescale Semiconductor
DDRE0
Bit 0
PTEx
0