M30281F6HP#U3B Renesas Electronics America, M30281F6HP#U3B Datasheet - Page 412

• Manufacturer Part Number: M30281F6HP#U3B
• Description: IC M16C/28 MCU FLASH 48K 64LQFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M16C/Tiny/28r

Specifications of M30281F6HP#U3B

• Core Processor: M16C/60
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: I²C, IEBus, SIO, UART/USART
• Peripherals: DMA, POR, PWM, Voltage Detect, WDT
• Number Of I /o: 55
• Program Memory Size: 48KB (48K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 13x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-LQFP
• For Use With: R0K330290S000BE - KIT EVAL STARTER FOR M16C/29M30290T2-CPE - EMULATOR COMPACT M16C/26A/28/29M30290T2-CPE-HP - EMULATOR COMPACT FOR M16C/TINY
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Rev.
REVISION HISTORY
Date
Page
166
167
168
170
171
172
174
176
177
179
180
185
186
187
190
194
196
198
202
203
204
206
210
211
213
215
217
• Table 14.4 P6
• Figure 14.10 Typical transmit/receive timings in clock synchronous serial I/
• 14.1.1.1 Counter Measure for Communication Error Occurs added
• Figure 14.14 Transfer Clock Output From Multiple Pins Note 2 added
• Figure 14.15 CTS/RTS Separate Function Usage Note 1 added
• Table 14.5 UART Mode Specifications Transfer clock modified
• Table 14.8 P6
• Figure 14.17 Receive Operation revised
• 14.1.2.1 Bit Rates added
• Table 14.9 Example of Bit Rates and Settings added
• 14.1.2.2 Counter Measure for Communication Error added
• Figure 14.21 CTS/RTS Separate Function Note 1 added
• Table 14.10 I
• Figure 14.23 Transfer to U2RB Register and Interrupt Timing modified
• Figure 14.24 Detection of Start and Stop Condition modified
• Table 14.14 STSPSEL Bit Functions modified
• Table 14.15 Special Mode 2 Specifications Transfer clock modified
• 14.1.5 Special Mode 3 (IEBus mode)(UART2) modified
• Table 14.18 SIM Mode Specifications Transfer clock modified
• Figure 14.31 Transmit and Receive Timing in SIM Mode revised
• Figure 14.36 S3C and S4C Registers, S3BRG and S4BRG Registers, and
• Table 14.20 SI/O3 and SI/O4 Mode Specifications Transfer clock modified
• Figure 14.38 Polarity of Transfer Clock modified
A/D Converter
• Note added
• Table 15.1 A/D Converter Performance Integral Nonlinearity Error modified
• Figure 15.4 ADCON0 to ADCON2 Registers ADCON2 register: b2-b1 function
• Figure 15.5 TB2SC Register b6-b5 modified, reserved bit area modified
• Figure 15.4 ADCON0 to ADCON2 Registers in One-shot Mode ADCON2
• Figure 15.9 ADCON0 to ADCON2 Registers in Repeat Mode ADCON2 regis-
• Figure 15.11 ADCON0 to ADCON2 Registers in Single Sweep Mode
O mode Example of receive timing: figure modified
S3TRR and S4TRR Registers Value after reset modified; S3C and S4C Regis-
ters: note 4 modified
modified
register: b2-b1 function modified
ter: b2-b1 function modified
ADCON2 register: b2-b1 function modified
M16C/28 Group (M16C/28, M16C/28B) Hardware Manual
2
______
4
4
C bus Mode Specifications Transfer clock modified
Pin Functions Note 1 added
Pin Functions in UART mode Note 1 added
______
C-5
Description
Summary