HD64F2218UTF24 Renesas Electronics America, HD64F2218UTF24 Datasheet - Page 138

IC H8S MCU FLASH 128K 100-TQFP

HD64F2218UTF24

Manufacturer Part Number
HD64F2218UTF24
Description
IC H8S MCU FLASH 128K 100-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2200r
Datasheets

Specifications of HD64F2218UTF24

Core Processor
H8S/2000
Core Size
16-Bit
Speed
24MHz
Connectivity
SCI, SmartCard, USB
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
69
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
12K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 6x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
For Use With
3DK2218-SS - KIT DEV H8S/2218 WINDOWS SIDESHW
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD64F2218UTF24
Manufacturer:
RENESAS
Quantity:
14
Part Number:
HD64F2218UTF24V
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
Section 2 Instruction Descriptions
2.2.35 (1)
LDC (LoaD to Control register)
Operation
<EAs>
Assembly-Language Format
LDC.B <EAs>, CCR
Operand Size
Byte
Description
This instruction loads the source operand contents into the condition-code register (CCR).
No interrupt requests, including NMI, are accepted immediately after execution of this instruction.
Available Registers
Rs: R0L to R7L, R0H to R7H
Operand Format and Number of States Required for Execution
Notes
Rev. 4.00 Feb 24, 2006 page 122 of 322
REJ09B0139-0400
Immediate
Register direct
Addressing
Mode
CCR
LDC (B)
Mnemonic
LDC.B
LDC.B
#xx:8, CCR
Operands
Rs, CCR
1st byte
0
0
7
3
Condition Code
I:
H: Loaded from the corresponding bit in the
N: Loaded from the corresponding bit in the
Z: Loaded from the corresponding bit in the
V: Loaded from the corresponding bit in the
C: Loaded from the corresponding bit in the
2nd byte
0
Instruction Format
Loaded from the corresponding bit in the
source operand.
source operand.
source operand.
source operand.
source operand.
source operand.
IMM
I
rs
UI H
3rd byte
U
N
4th byte
Z
V
Load CCR
States
No. of
C
1
1

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