MCF5275CVM166J Freescale Semiconductor, MCF5275CVM166J Datasheet - Page 13

• Manufacturer Part Number: MCF5275CVM166J
• Description: IC MCU 166MHZ 256MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: MCF527xr

Specifications of MCF5275CVM166J

• Core Processor: Coldfire V2
• Core Size: 32-Bit
• Speed: 166MHz
• Connectivity: EBI/EMI, Ethernet, I²C, SPI, UART/USART, USB
• Peripherals: DMA, WDT
• Number Of I /o: 69
• Program Memory Type: ROMless
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 256-MAPBGA
• Processor Series: MCF527x
• Core: ColdFire V2
• 3rd Party Development Tools: JLINK-CF-BDM26, EWCF
• Development Tools By Supplier: NNDK-MOD5272-KIT, NNDK-MOD5270-KIT
• Leaded Process Compatible: No
• Rohs Compliant: No
• Peak Reflow Compatible (260 C): No
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Details

The serial mode interface operates in what is generally referred to as AMD mode. The MCF5275
configuration for seven-wire serial mode connections to the external transceiver are shown in
Refer to the M5275EVB evaluation board user’s manual for an example of how to connect an external
PHY. Schematics for this board are accessible at the MCF5275 site by navigating to:
http://www.freescale.com/coldfire.
5.7.3
Use the BDM interface as shown in the M5275EVB evaluation board user’s manual. The schematics for
this board are accessible at the MCF5275 site by navigating to: http://www.freescale.com/coldfire.
Freescale Semiconductor
BDM
MCF5275 Integrated Microprocessor Family Hardware Specification, Rev. 4
Transmit clock
Transmit enable
Transmit data
Collision
Receive clock
Receive enable
Receive data
Unused, configure as PB14
Unused input, tie to ground
Unused, configure as PB[13:11]
Unused output, ignore
Unused, configure as PB[10:8]
Unused, configure as PB15
Input after reset, connect to ground
Collision
Carrier sense
Receive clock
Receive enable
Receive data
Receive error
Management channel clock
Management channel serial data
Table 5. Seven-Wire Mode Configuration
Signal Description
Signal Description
Table 4. MII Mode (continued)
FECn_COL
FECn_CRS
FECn_RXCLK
FECn_RXDV
FECn_RXD[3:0]
FECn_RXER
FECn_MDC
FECn_MDIO
MCF5275 Pin
FECn_TXCLK
FECn_TXEN
FECn_TXD[0]
FECn_COL
FECn_RXCLK
FECn_RXDV
FECn_RXD[0]
FECn_RXER
FECn_CRS
FECn_RXD[3:1]
FECn_TXER
FECn_TXD[3:1]
FECn_MDC
FECn_MDIO
MCF5275 Pin
Design Recommendations
Table
5.
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