DF2339VFC25 Renesas Electronics America, DF2339VFC25 Datasheet - Page 43
![IC H8S MCU FLASH 384K 144QFP](/photos/28/61/286127/144-bfqfp_sml.jpg)
DF2339VFC25
Manufacturer Part Number
DF2339VFC25
Description
IC H8S MCU FLASH 384K 144QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Specifications of DF2339VFC25
Core Processor
H8S/2000
Core Size
16-Bit
Speed
25MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
106
Program Memory Size
384KB (384K x 8)
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 12x10b; D/A 4x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
144-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Other names
HD64F2339VFC25
HD64F2339VFC25
HD64F2339VFC25
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DF2339VFC25V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
- Current page: 43 of 341
- Download datasheet (2Mb)
Type
Bit-manipulation
instructions
Instruction
BSET
BCLR
BNOT
BTST
BAND
BIAND
BOR
BIOR
Size *
B
B
B
B
B
B
B
B
1
Function
1
Sets a specified bit in a general register or memory
operand to 1. The bit number is specified by 3-bit
immediate data or the lower three bits of a general
register.
0
Clears a specified bit in a general register or memory
operand to 0. The bit number is specified by 3-bit
immediate data or the lower three bits of a general
register.
Inverts a specified bit in a general register or memory
operand. The bit number is specified by 3-bit
immediate data or the lower three bits of a general
register.
Tests a specified bit in a general register or memory
operand and sets or clears the Z flag accordingly. The
bit number is specified by 3-bit immediate data or the
lower three bits of a general register.
C
ANDs the carry flag with a specified bit in a general
register or memory operand and stores the result in the
carry flag.
C
ANDs the carry flag with the inverse of a specified bit in
a general register or memory operand and stores the
result in the carry flag.
The bit number is specified by 3-bit immediate data.
C
ORs the carry flag with a specified bit in a general
register or memory operand and stores the result in the
carry flag.
C
ORs the carry flag with the inverse of a specified bit in
a general register or memory operand and stores the
result in the carry flag.
The bit number is specified by 3-bit immediate data.
(<bit-No.> of <EAd>)
(<bit-No.> of <EAd>)
(<bit-No.> of <EAd>)
(<bit-No.> of <EAd>)
(<bit-No.> of <EAd>)
(<bit-No.> of <EAd>)
(<bit-No.> of <EAd>)
(<bit-No.> of <EAd>)
Rev. 4.00 Feb 24, 2006 page 27 of 322
(<bit-No.> of <EAd>)
Z
C
C
C
C
REJ09B0139-0400
Section 1 CPU
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