UPD78F0500AMC-CAB-AX Renesas Electronics America, UPD78F0500AMC-CAB-AX Datasheet - Page 188

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UPD78F0500AMC-CAB-AX

Manufacturer Part Number
UPD78F0500AMC-CAB-AX
Description
MCU 8BIT 30SSOP
Manufacturer
Renesas Electronics America
Series
78K0/Kx2r
Datasheet

Specifications of UPD78F0500AMC-CAB-AX

Core Processor
78K/0
Core Size
8-Bit
Speed
20MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
23
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
78K0/Kx2
5.2.6 Port 5
Remark √: Mounted, −: Not mounted
mode register 5 (PM5). When the P50 to P57 pins are used as an input port, use of an on-chip pull-up resistor can be
specified in 1-bit units by pull-up resistor option register 5 (PU5).
R01UH0008EJ0401 Rev.4.01
Jul 15, 2010
P50
P51
P52
P53
P54
P55
P56
P57
Port 5 is an I/O port with an output latch. Port 5 can be set to the input mode or output mode in 1-bit units using port
Reset signal generation sets port 5 to input mode.
Figure 5-16 shows a block diagram of port 5.
Remark With products not provided with an EV
P5:
PU5:
PM5:
RD:
WR××: Write signal
WR
WR
WR
Port register 5
Pull-up resistor option register 5
Port mode register 5
Read signal
RD
PORT
PU
PM
78K0/KB2
PM50 to PM57
PU50 to PU57
(P50 to P57)
Output latch
PM5
PU5
P5
Figure 5-16. Block Diagram of P50 to P57
78K0/KC2
DD
or EV
Selector
78K0/KD2
SS
pin, replace EV
whose flash
memory is
Products
less than
32 KB
DD
78K0/KE2
with V
CHAPTER 5 PORT FUNCTIONS
DD
memory is at
whose flash
, or replace EV
Products
48 KB
EV
least
DD
P-ch
P50 to P57
SS
78K0/KF2
with V
SS
.
188

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