UPD78F0500AMC-CAB-AX Renesas Electronics America, UPD78F0500AMC-CAB-AX Datasheet - Page 396

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UPD78F0500AMC-CAB-AX

Manufacturer Part Number
UPD78F0500AMC-CAB-AX
Description
MCU 8BIT 30SSOP
Manufacturer
Renesas Electronics America
Series
78K0/Kx2r
Datasheet

Specifications of UPD78F0500AMC-CAB-AX

Core Processor
78K/0
Core Size
8-Bit
Speed
20MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
23
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
78K0/Kx2
11.1 Functions of Watchdog Timer
signal is generated.
details of RESF, see CHAPTER 23 RESET FUNCTION.
R01UH0008EJ0401 Rev.4.01
Jul 15, 2010
The watchdog timer is mounted onto all 78K0/Kx2 microcontroller products.
The watchdog timer operates on the internal low-speed oscillation clock.
The watchdog timer is used to detect an inadvertent program loop. If a program loop is detected, an internal reset
Program loop is detected in the following cases.
• If the watchdog timer counter overflows
• If a 1-bit manipulation instruction is executed on the watchdog timer enable register (WDTE)
• If data other than “ACH” is written to WDTE
• If data is written to WDTE during a window close period
• If the instruction is fetched from an area not set by the IMS and IXS registers (detection of an invalid check while the
• If the CPU accesses an area that is not set by the IMS and IXS registers (excluding FB00H to FFCFH and FFE0H to
When a reset occurs due to the watchdog timer, bit 4 (WDTRF) of the reset control flag register (RESF) is set to 1. For
CPU hangs up)
FFFFH) by executing a read/write instruction (detection of an abnormal access during a CPU program loop)
CHAPTER 11 WATCHDOG TIMER
CHAPTER 11 WATCHDOG TIMER
396

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