SAK-TC1736-128F80HL AA Infineon Technologies, SAK-TC1736-128F80HL AA Datasheet - Page 76
SAK-TC1736-128F80HL AA
Manufacturer Part Number
SAK-TC1736-128F80HL AA
Description
IC MCU 32BIT 1MB FLASH 144LQFP
Manufacturer
Infineon Technologies
Series
TC17xxr
Datasheet
1.SAK-TC1736-128F80HL_AA.pdf
(123 pages)
Specifications of SAK-TC1736-128F80HL AA
Core Processor
TriCore
Core Size
32-Bit
Speed
80MHz
Connectivity
ASC, CAN, MLI, MSC, SSC
Peripherals
DMA, POR, WDT
Number Of I /o
70
Program Memory Size
1MB (1M x 8)
Program Memory Type
FLASH
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
1.42 V ~ 1.58 V
Data Converters
A/D 24x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
144-LFQFP
Packages
PG-LQFP-144
Max Clock Frequency
80.0 MHz
Sram (incl. Cache)
48.0 KByte
Can Nodes
2
A / D Input Lines (incl. Fadc)
24
Program Memory
1.0 MB
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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Table 3-1
Pin
85
83
117
81
82
87
88
89
90
91
94
96
97
98
1) TC1736ED : PG-LQFP-144-10
2) This pin is also connected to the analog power supply for comparator of the ADC module.
3) For the emulation device (ED), this pin is bonded to VDD
Legend for
Column “Ctrl.”:
I = Input (for GPIO port lines with IOCR bit field selection PCx = 0XXX
Data Sheet
this pin is bonded to a VDD pad.
Symbol
V
V
V
XTAL1
XTAL2
TDI/BRKIN/
BRKOUT
TMS/DAP1
TDO/DAP2/
BRKIN/
BRKOUT
TRST
TCK/DAP0
TESTMODE
ESR1
PORST
ESR0
DDOSC3
SSOSC
DDFL3
Table 3-1
Pin Definitions and Functions (PG-LQFP-144-10 Package)
Ctrl.
–
–
–
I
O
I/O
I/O
I/O
I
I
I
I/O
I
I/O
Type Function
–
–
–
–
–
A2/
PU
A2/
PD
A2/
PU
A1/
PD
A1/
PD
PU
A2/
PD
PD
A2/
PD
Main Oscillator Power Supply (3.3V)
Main Oscillator and PLL Ground
Power Supply for Flash (3.3V)
Main Oscillator Input
Main Oscillator Output
JTAG Serial Data Input /
OCDS Break Input /
OCDS Break Output (controlled by OCDS
module)
JTAG State Machine Control Input /
Device Access Port Line 1
JTAG Serial Data Output /
Device Access Port Line 2 /
OCDS Break Input /
OCDS Break Output (controlled by OCDS
module)
JTAG Reset Input
JTAG Clock Input /
Device Access Port Line 0
Test Mode Select Input
External System Request Reset Input 1
Power On Reset Input
(input pad with input spike-filter)
External System Request Reset Input 0
72
SB
(ED Stand By RAM supply). In the non ED device,
B
)
V1.1, 2009-08
1)
(cont’d)
TC1736
Pinning
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