SAK-TC1197-512F180E AC Infineon Technologies, SAK-TC1197-512F180E AC Datasheet - Page 55
SAK-TC1197-512F180E AC
Manufacturer Part Number
SAK-TC1197-512F180E AC
Description
IC MCU 32BIT 4MB FLASH BGA416-10
Manufacturer
Infineon Technologies
Series
TC11xxr
Datasheet
1.SAK-TC1197-256F180E_AC.pdf
(183 pages)
Specifications of SAK-TC1197-512F180E AC
Core Processor
TriCore
Core Size
32-Bit
Speed
180MHz
Connectivity
ASC, CAN, EBI/EMI, MLI, MSC, SSC
Peripherals
DMA, POR, WDT
Number Of I /o
219
Program Memory Size
4MB (4M x 8)
Program Memory Type
FLASH
Ram Size
224K x 8
Voltage - Supply (vcc/vdd)
1.42 V ~ 1.58 V
Data Converters
A/D 48x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
416-BGA
Packages
PG-BGA-416
Max Clock Frequency
180.0 MHz
Sram (incl. Cache)
224.0 KByte
Can Nodes
4
A / D Input Lines (incl. Fadc)
48
Program Memory
4.0 MB
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
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As shown in
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FADC Power Supply and References
The FADC module is supplied by the following power supply and reference voltage lines:
•
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Input Structure
The input structure of the FADC in the TC1197 contains:
•
•
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Data Sheet
An Input Structure containing the differential inputs and impedance control.
An A/D Converter Stage responsible for the analog-to-digital conversion including an
input multiplexer to select between the channel amplifiers
A Data Reduction Unit containing programmable anti-aliasing and data reduction
filters
A Channel Trigger Control block determining the trigger and gating conditions for the
FADC channels
A Channel Timer for each channel to independently trigger the conversions
An A/D Control block responsible for the overall FADC functionality
V
V
the V
the V
V
to be fed in externally
V
A differential analog input stage for each input channel to select the input impedance
(differential or single-ended measurement) and to decouple the FADC input signal
from the pins.
Input channels 2 and 3 are overlaid with ADC1 input signals (AN28, AN29, AN30,
AN31), whereas input channels 0 and 1 are available on dedicated input pins (AN32,
AN33, AN34, AN35).
A channel amplifier for each input channel with a settling time (about 5µs) when
changing the characteristics of an input stage (changing between unused,
differential, single-ended N, or single-ended P mode).
DDMF
DDIF
DDAF
FAREF
DDIF
DDM
/ V
/ V
/ V
/ V
SSMF
SSAF
SSMF
Figure
supply does not appear as supply pin, because it is internally connected to
supply of the ADC that is sharing the FADC input pins.
FAGND
: FADC Analog Input Stage Power Supply (3.3 - 5 V),
: FADC Analog Part Power Supply (1.5 V),
: FADC Analog Channel Amplifier Power Supply (3.3 V)
: FADC Reference Voltage (3.3 V max.) and FADC Reference Ground
13, the main FADC functional blocks are:
51
Introduction
V1.1, 2009-05
TC1197
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