AT90S1200-4SC Atmel, AT90S1200-4SC Datasheet - Page 44

MCU 1K ISP FLASH 4MHZ 20-SOIC

AT90S1200-4SC

Manufacturer Part Number
AT90S1200-4SC
Description
MCU 1K ISP FLASH 4MHZ 20-SOIC
Manufacturer
Atmel
Series
AVR® 90Sr
Datasheet

Specifications of AT90S1200-4SC

Core Processor
AVR
Core Size
8-Bit
Speed
4MHz
Connectivity
SPI
Peripherals
POR, WDT
Number Of I /o
15
Program Memory Size
1KB (512 x 16)
Program Memory Type
FLASH
Eeprom Size
64 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 6 V
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
20-SOIC (7.5mm Width)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Ram Size
-
Data Converters
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT90S1200-4SC
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
Serial Downloading
Serial Programming
Algorithm
44
AT90S1200
Both the program and data memory arrays can be programmed using the SPI bus while
RESET is pulled to GND. The serial interface consists of pins SCK, MOSI (input) and
MISO (output) (see Figure 34). After RESET is set low, the Programming Enable
instruction needs to be executed first before program/erase instructions can be
executed.
Figure 34. Serial Programming and Verify
Note:
For the EEPROM, an auto-erase cycle is provided within the self-timed write instruction
and there is no need to first execute the Chip Erase instruction. The Chip Erase instruc-
tion turns the content of every memory location in both the Program and EEPROM
arrays into $FF.
The program and EEPROM memory arrays have separate address spaces: $0000 to
$01FF for Flash program memory and $000 to $03F for EEPROM data memory.
Either an external system clock is supplied at pin XTAL1 or a crystal needs to be con-
nected across pins XTAL1 and XTAL2. The minimum low and high periods for the Serial
Clock (SCK) input are defined as follows:
Low: > 1 XTAL1 clock cycle
High: > 4 XTAL1 clock cycles
When writing serial data to the AT90S1200, data is clocked on the rising edge of SCK.
When reading data from the AT90S1200, data is clocked on the falling edge of SCK.
See Figure 35 and Table 20 for timing details.
To program and verify the AT90S1200 in the Serial Programming mode, the following
sequence is recommended (See 4-byte instruction formats in Table 17 ):
1. Power-up sequence:
2. Wait for at least 20 ms and enable serial programming by sending the Program-
Apply power between V
tal is not connected across pins XTAL1 and XTAL2 or the device is not running from
the Internal RC Oscillator, apply a clock signal to the XTAL1 pin. If the programmer
can not guarantee that SCK is held low during power-up, RESET must be given a
positive pulse after SCK has been set to “0”.
ming Enable serial instruction to the MOSI (PB5) pin.
If the device is clocked by the Internal Oscillator, it is no need to connect a clock source
to the XTAL1 pin
CLOCK INPUT
GND
CC
and GND while RESET and SCK are set to “0”. If a crys-
RESET
XTAL1
GND
AT90S1200
VCC
PB7
PB6
PB5
2.7 - 6.0V
SCK
MISO
MOSI
0838H–AVR–03/02

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