AT90S2313-4PI Atmel, AT90S2313-4PI Datasheet - Page 68

IC MCU 2K 4MHZ UART LV IT 20DIP

AT90S2313-4PI

Manufacturer Part Number
AT90S2313-4PI
Description
IC MCU 2K 4MHZ UART LV IT 20DIP
Manufacturer
Atmel
Series
AVR® 90Sr
Datasheet

Specifications of AT90S2313-4PI

Core Processor
AVR
Core Size
8-Bit
Speed
4MHz
Connectivity
SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
15
Program Memory Size
2KB (1K x 16)
Program Memory Type
FLASH
Eeprom Size
128 x 8
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 6 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
20-DIP (0.300", 7.62mm)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Data Converters
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT90S2313-4PI
Manufacturer:
ATMEL
Quantity:
5 530
Part Number:
AT90S2313-4PI
Quantity:
5 510
Part Number:
AT90S2313-4PI
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
Serial Downloading
Serial Programming
Algorithm
68
AT90S2313
Both the program and data memory arrays can be programmed using the serial SPI bus
while RESET is pulled to GND. The serial interface consists of pins SCK, MOSI (input)
and MISO (output). See Figure 53. After RESET is set low, the Programming Enable
instruction needs to be executed first before program/erase instructions can be
executed.
Figure 53. Serial Programming and Verify
For the EEPROM, an auto-erase cycle is provided within the self-timed write instruction
and there is no need to first execute the Chip Erase instruction. The Chip Erase instruc-
tion turns the content of every memory location in both the program and EEPROM
arrays into $FF.
The program and EEPROM memory arrays have separate address spaces: $0000 to
$03FF for program Flash memory and $000 to $07F for EEPROM data memory.
Either an external clock is supplied at pin XTAL1 or a crystal needs to be connected
across pins XTAL1 and XTAL2. The minimum low and high periods for the serial clock
(SCK) input are defined as follows:
Low: > 2 XTAL1 clock cycle
High: > 2 XTAL1 clock cycles
When writing serial data to the AT90S2313, data is clocked on the rising edge of SCK.
When reading data from the AT90S2313, data is clocked on the falling edge of SCK.
See Figure 54, Figure and Table 29 for timing details.
To program and verify the AT90S2313 in the Serial Programming mode, the following
sequence is recommended (See 4-byte instruction formats in Table 28):
1. Power-up sequence:
2. Wait for at least 20 ms and enable serial programming by sending the Program-
3. The serial programming instructions will not work if the communication is out of
Apply power between V
tal is not connected across pins XTAL1 and XTAL2, apply a clock signal to the
XTAL1 pin. In some systems, the programmer cannot guarantee that SCK is held
low during Power-up. In this case, RESET must be given a positive pulse of at least
two XTAL1 cycles duration after SCK has been set to “0”.
ming Enable serial instruction to the MOSI (PB5) pin.
synchronization. When in sync, the second byte ($53) will echo back when issu-
CLOCK INPUT
CC
and GND while RESET and SCK are set to “0”. If a crys-
GND
RESET
XTAL1
AT90S2313
VCC
PB7
PB6
PB5
2.7 - 6.0V
SCK
MISO
MOSI
0839I–AVR–06/02

Related parts for AT90S2313-4PI