PIC16LF84AT-04/SO Microchip Technology, PIC16LF84AT-04/SO Datasheet - Page 21
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PIC16LF84AT-04/SO
Manufacturer Part Number
PIC16LF84AT-04/SO
Description
IC MCU FLASH 1KX14 EE 18SOIC
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheets
1.PIC16F84A-04P.pdf
(88 pages)
2.PIC16F84A-04P.pdf
(6 pages)
3.PIC16LF84A-04P.pdf
(125 pages)
4.PIC16LF84A-04P.pdf
(4 pages)
Specifications of PIC16LF84AT-04/SO
Core Processor
PIC
Core Size
8-Bit
Speed
4MHz
Peripherals
POR, WDT
Number Of I /o
13
Program Memory Size
1.75KB (1K x 14)
Program Memory Type
FLASH
Eeprom Size
64 x 8
Ram Size
68 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Package / Case
18-SOIC (7.5mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Data Converters
-
Connectivity
-
5.0
The PIC16F8X has two ports, PORTA and PORTB.
Some port pins are multiplexed with an alternate func-
tion for other features on the device.
5.1
PORTA is a 5-bit wide latch. RA4 is a Schmitt Trigger
input and an open drain output. All other RA port pins
have TTL input levels and full CMOS output drivers. All
pins have data direction bits (TRIS registers) which can
configure these pins as output or input.
Setting a TRISA bit (=1) will make the corresponding
PORTA pin an input, i.e., put the corresponding output
driver in a hi-impedance mode. Clearing a TRISA bit
(=0) will make the corresponding PORTA pin an output,
i.e., put the contents of the output latch on the selected
pin.
Reading the PORTA register reads the status of the pins
whereas writing to it will write to the port latch. All write
operations are read-modify-write operations. So a write
to a port implies that the port pins are first read, then this
value is modified and written to the port data latch.
The RA4 pin is multiplexed with the TMR0 clock input.
FIGURE 5-1:
Data
bus
WR
Port
WR
TRIS
Note: I/O pins have protection diodes to V
RD PORT
1998 Microchip Technology Inc.
I/O PORTS
PORTA and TRISA Registers
D
Data Latch
D
TRIS Latch
CK
CK
BLOCK DIAGRAM OF PINS
RA3:RA0
Q
Q
Q
Q
RD TRIS
Q
EN
D
TTL
input
buffer
DD
V
V
P
N
SS
DD
and V
SS
I/O pin
.
EXAMPLE 5-1:
CLRF
BSF
MOVLW
MOVWF
FIGURE 5-2:
Data
bus
WR
TRIS
WR
PORT
RD PORT
Note: I/O pin has protection diodes to V
TMR0 clock input
PORTA
STATUS, RP0
0x0F
TRISA
TRIS Latch
Data Latch
D
D
CK
CK
BLOCK DIAGRAM OF PIN RA4
RD TRIS
INITIALIZING PORTA
Q
Q
Q
Q
; Initialize PORTA by
; setting output
; data latches
; Select Bank 1
; Value used to
; initialize data
; direction
; Set RA<3:0> as inputs
; RA4 as outputs
; TRISA<7:5> are always
; read as ’0’.
PIC16F8X
Q
EN
Schmitt
Trigger
input
buffer
EN
D
DS30430C-page 21
V
N
SS
SS
only.
RA4 pin