PIC18C252-E/SP Microchip Technology, PIC18C252-E/SP Datasheet - Page 214
![IC MCU OTP 16KX16 A/D 28DIP](/photos/6/59/65908/150-28-dip_sml.jpg)
PIC18C252-E/SP
Manufacturer Part Number
PIC18C252-E/SP
Description
IC MCU OTP 16KX16 A/D 28DIP
Manufacturer
Microchip Technology
Series
PIC® 18Cr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC16C770-ISO.pdf
(8 pages)
3.PIC18C242-ISO.pdf
(305 pages)
4.PIC18C242-ISO.pdf
(12 pages)
Specifications of PIC18C252-E/SP
Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
22
Program Memory Size
32KB (16K x 16)
Program Memory Type
OTP
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 5x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
28-DIP (0.300", 7.62mm)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Other names
PIC18C252E/SP
- PIC16F616T-ISL PDF datasheet
- PIC16C770-ISO PDF datasheet #2
- PIC18C242-ISO PDF datasheet #3
- PIC18C242-ISO PDF datasheet #4
- Current page: 214 of 305
- Download datasheet (6Mb)
PIC18CXX2
MOVFF
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
1st word (source)
2nd word (destin.)
Description:
Words:
Cycles:
Example:
DS39026C-page 212
Q Cycle Activity:
Before Instruction
After Instruction
Decode
Decode
REG1
REG2
REG1
REG2
Q1
No dummy
register ’f’
operation
Move f to f
[label]
0
0
(f
None
The contents of source register ’f
are moved to destination register
’f
anywhere in the 4096 byte data
space (000h to FFFh), and location
of destination ’f
where from 000h to FFFh.
Either source or destination can be
WREG (a useful special situation).
MOVFF is particularly useful for
transferring a data memory location
to a peripheral register (such as the
transmit buffer or an I/O port).
The MOVFF instruction cannot use
the PCL, TOSU, TOSH or TOSL as
the destination register.
2
2 (3)
MOVFF
d
Read
s
(src)
read
1100
1111
’. Location of source ’f
)
No
Q2
=
=
=
=
f
f
s
d
f
d
4095
0x33
0x11
0x33,
0x33
4095
MOVFF f
REG1, REG2
ffff
ffff
operation
Process
Data
No
d
Q3
’ can also be any-
s
ffff
ffff
,f
d
s
operation
register ’f’
’ can be
(dest)
Write
No
Q4
fff
fff
f
f
s
s
d
’
MOVLB
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example:
Q Cycle Activity:
Before Instruction
After Instruction
Decode
BSR register
BSR register
Q1
Read literal
Move literal to low nibble in BSR
[ label ]
0
k
None
The 8-bit literal ’k’ is loaded into
the Bank Select Register (BSR).
1
1
MOVLB
0000
Q2
’k’
k
BSR
2001 Microchip Technology Inc.
255
=
=
5
MOVLB k
0001
0x02
0x05
Process
Data
Q3
kkkk
literal ’k’ to
Write
BSR
Q4
kkkk
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