T89C51CC01CA-SLSIM Atmel, T89C51CC01CA-SLSIM Datasheet - Page 4

IC 8051 MCU FLASH 32K 44PLCC

T89C51CC01CA-SLSIM

Manufacturer Part Number
T89C51CC01CA-SLSIM
Description
IC 8051 MCU FLASH 32K 44PLCC
Manufacturer
Atmel
Series
AT89C CANr

Specifications of T89C51CC01CA-SLSIM

Core Processor
8051
Core Size
8-Bit
Speed
40MHz
Connectivity
CAN, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
32
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
1.25K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
44-PLCC
For Use With
AT89STK-06 - KIT DEMOBOARD 8051 MCU W/CAN
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
T89C51CC01CASLSIM

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
T89C51CC01CA-SLSIM
Manufacturer:
Atmel
Quantity:
10 000
Mapping and Default
Value of Hardware
Security Byte
Security
4
T89C51CC01 UART Bootloader
The 4 MSB of the Hardware Byte can be read/written by software (this area is called Fuse bits).
The 4 LSB can only be read by software and written by hardware in parallel mode (with parallel
programmer devices).
Note:
The bootloader has Software Security Byte (SSB) to protect itself from user access or ISP
access.
The Software Security Byte (SSB) protects from ISP accesses. The command "Program Soft-
ware Security Bit" can only write a higher priority level. There are three levels of security:
Only a full chip erase command can reset the software security bits.
level 0: NO_SECURITY (FFh)
This is the default level.
From level 0, one can write level 1 or level 2.
level 1: WRITE_SECURITY (FEh)
In this level it is impossible to write in the Flash memory, BSB and SBV.
The Bootloader returns an error message.
From level 1, one can write only level 2.
level 2: RD_WR_SECURITY (FCh)
Level 2 forbids all read and write accesses to/from the Flash memory.
The Bootloader returns an error message.
Flash/EEPROM
Fuse bit
BSB & SBV & EB Any access allowed
SSB
Manufacturer info Read only access allowed
Bootloader info
Erase block
Full chip erase
Blank Check
Bit Position
U: Unprogram = 1
P: Program = 0
7
6
5
4
3
2
1
0
X2B
BLJB
reserved
reserved
reserved
LB2
LB1
LB0
Mnemonic
Any access allowed
Any access allowed
Any access allowed
Read only access allowed
Allowed
Allowed
Allowed
Level 0
Default Value
U
P
U
U
U
P
U
U
Read only access allowed
Read only access allowed
Read only access allowed
Write level2 allowed
Read only access allowed
Read only access allowed
Not allowed
Allowed
Allowed
Description
To start in x1 mode
To map the boot area in code area between F800h-
FFFFh
To lock the chip (see data sheet)
Level 1
All access not allowed
All access not allowed
All access not allowed
Read only access allowed
Read only access allowed
Read only access allowed
Not allowed
Allowed
Allowed
Level 2
4211C–CAN–03/08

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