T89C51RD2-SLSIM Atmel, T89C51RD2-SLSIM Datasheet - Page 13
![IC MICRO CTRL 64K FLASH 44PLCC](/photos/6/70/67043/453-44-plcc_sml.jpg)
T89C51RD2-SLSIM
Manufacturer Part Number
T89C51RD2-SLSIM
Description
IC MICRO CTRL 64K FLASH 44PLCC
Manufacturer
Atmel
Series
89Cr
Datasheet
1.T89C51RD2-SMSIM.pdf
(104 pages)
Specifications of T89C51RD2-SLSIM
Core Processor
8051
Core Size
8-Bit
Speed
40MHz
Connectivity
SPI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
32
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
1.25K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-PLCC
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Data Converters
-
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- Download datasheet (2Mb)
Dual Data Pointer
Register Ddptr
Figure 3. Use of Dual Pointer
4243G–8051–05/03
7
AUXR1(A2H)
DPS
0
The additional data pointer can be used to speed up code execution and reduce code
size.
The dual DPTR structure is a way by which the chip will specify the address of an exter-
nal data memory location. There are two 16-bit DPTR registers that address the external
memory, and a single bit called
DPS = AUXR1/bit0 (See Table 5.) that allows the program code to switch between them
(Refer to Figure 3).
Table 5. AUXR1: Auxiliary Register 1
1.
Address 0A2H
Symbol
AUXR1
DPS
GF3
-
User software should not write 1s to reserved bits. These bits may be used in future 8051
2. Bit 2 stuck at 0; this allows to use INC AUXR1 to toggle DPS without changing GF3.
DPH(83H) DPL(82H)
family products to invoke new feature. In that case, the reset value of the new bit will
be 0, and its active value will be 1. The value read from a reserved bit is
indeterminate.
Function
Not implemented, reserved for future use.
Data Pointer Selection.
This bit is a general purpose user flag
Reset value
DPTR1
DPS
0
1
DPTR0
Operating Mode
DPTR0 Selected
DPTR1 Selected
X
-
X
-
(2)
.
X
-
(1)
External Data Memory
X
-
GF3
0
T89C51RD2
0
0
X
-
DPS
0
13
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