T89C51RD2-SLSIM Atmel, T89C51RD2-SLSIM Datasheet - Page 77
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T89C51RD2-SLSIM
Manufacturer Part Number
T89C51RD2-SLSIM
Description
IC MICRO CTRL 64K FLASH 44PLCC
Manufacturer
Atmel
Series
89Cr
Datasheet
1.T89C51RD2-SMSIM.pdf
(104 pages)
Specifications of T89C51RD2-SLSIM
Core Processor
8051
Core Size
8-Bit
Speed
40MHz
Connectivity
SPI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
32
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
1.25K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-PLCC
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Data Converters
-
4243G–8051–05/03
PEULCK
PELCK
Name
PGMC
Mode
PGMV
PGMS
PGML
CERR
PGXC
PGXL
RXAF
VSB
TMS
1. In Page Load Mode the current byte is loaded on ALE rising edge.
2. After a power up all external test mode to program or to erase the Flash are locked to avoid any untimely programming or
3. The highest security bit (bit 7) is used to secure the 7 lowest bit erasure. The only way to erase this bit is to erase the whole
erasure.
After each programming or erasure test mode, it’s advised to lock this feature (test mode PELCK).
To validate the test mode mode PEULCK the following sequence has to be applied:Test Mode PEULCK with ALE = 1.
Pulse on ALE (min width=25clk) with P0=55 (P0 latched on ALE rising edge)
Pulse on ALE (min width=25clk) with P0=AA (P0 latched on ALE rising edge)
Flash memory.
Procedure to program security bits (After array programming):
- program bit7 to 0, program all other bits ( 1 = erased, 0 = programmed).
- test mode PGMS (din = HSB).
Procedure to erase security byte:
- test mode CERR: erase all array included HSB.
- program hardware security byte to FF: test mode PGMS (din = FF).
Mode
Program or Erase Lock.
Disable the Erasure or Programming access
Program or Erase UnLock.
Enable the Erasure or Programming access
Write Code Data (byte)
or write Page
Always precedeed by PGML
Memory Page Load
(up to 128 bytes)
Read Code Data (byte)
Read Security Byte (=HSB)
Write lock Byte (Note 4)
(security byte = HSB)
Chip Erase User + XAF
Write Byte or Page Extra Memory (XAF)
Always precedeed by PGXL
Memory Page Load XAF
(up to 128 bytes)
Read Signature bytes
30h (Manufacturer code)
31h (Device ID #1)
60h (Device ID #2)
61h (Device ID #3)
Read Extra Memory
(XAF)
P1[7..0]
A7-A0
A7-A0
A7-A0
A7-A0
(0-7F)
A7-A0
(0-7F)
(0-7F)
Addr
30h
31h
60h
61h
xx
xx
xx
xx
xx
P2[5..0]
A13-A8
A13-A8
A13-A8
00
xx
xx
xx
xx
xx
xx
xx
x
P3.0
x
x
1
1
1
1
1
1
1
1
x
1
P3.1
x
x
x
x
x
x
x
x
x
x
x
x
P3.2
x
x
x
x
x
x
x
x
x
x
x
x
T89C51RD2
P3.3
1
0
0
0
1
1
0
0
0
1
1
0
P3.4
A14
A14
A14
x
x
x
x
x
x
x
x
x
P3.5
A15
A15
A15
x
x
x
x
x
x
x
x
x
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