PIC18F4439-E/P Microchip Technology, PIC18F4439-E/P Datasheet - Page 280
PIC18F4439-E/P
Manufacturer Part Number
PIC18F4439-E/P
Description
IC PIC MCU FLASH 6KX16 40DIP
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC18F2439-ISO.pdf
(322 pages)
3.PIC18F2439-ISO.pdf
(6 pages)
4.PIC18F2439-ISO.pdf
(34 pages)
Specifications of PIC18F4439-E/P
Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
32
Program Memory Size
12KB (6K x 16)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
640 x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
40-DIP (0.600", 15.24mm)
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
640 B
Interface Type
I2C, SPI, AUSART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
32
Number Of Timers
16 bit
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
Through Hole
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
DV164005, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
8
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18F4439-E/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
- PIC16F616T-ISL PDF datasheet
- PIC18F2439-ISO PDF datasheet #2
- PIC18F2439-ISO PDF datasheet #3
- PIC18F2439-ISO PDF datasheet #4
- Current page: 280 of 322
- Download datasheet (7Mb)
PIC18FXX39
FIGURE 23-14:
TABLE 23-13: EXAMPLE SPI MODE REQUIREMENTS (SLAVE MODE TIMING (CKE = 0))
DS30485A-page 278
70
71
71A
72
72A
73
73A
74
75
76
77
78
79
80
83
Note 1: Requires the use of Parameter # 73A.
Param. No.
(CKP = 0)
(CKP = 1)
SDI
SDI
SCK
SDO
SS
SCK
Note:
2: Only if Parameter # 71A and # 72A are used.
TssL2scH,
TssL2scL
TscH
TscL
TdiV2scH,
TdiV2scL
T
TscH2diL,
TscL2diL
TdoR
TdoF
TssH2doZ
TscR
TscF
TscH2doV,
TscL2doV
TscH2ssH,
TscL2ssH
Refer to Figure 23-4 for load conditions.
B
Symbol
2
B
EXAMPLE SPI SLAVE MODE TIMING (CKE = 0)
70
SS↓ to SCK↓ or SCK↑ input
SCK input high time (Slave mode)
SCK input low time (Slave mode)
Setup time of SDI data input to SCK edge
Last clock edge of Byte 1 to the first clock edge of Byte 2
Hold time of SDI data input to SCK edge
SDO data output rise time
SDO data output fall time
SS↑ to SDO output hi-impedance
SCK output rise time (Master mode)
SCK output fall time (Master mode)
SDO data output valid after SCK edge PIC18FXXXX
SS ↑ after SCK edge
80
71
73
MSb In
MSb
74
72
Characteristic
75, 76
Preliminary
bit6 - - - - - -1
bit6 - - - -1
Continuous
Single Byte
Continuous
Single Byte
PIC18FXXXX
PIC18LFXXXX
PIC18FXXXX
PIC18LFXXXX
PIC18FXXXX
PIC18LFXXXX
PIC18FXXXX
PIC18LFXXXX
PIC18LFXXXX
78
79
1.25 T
1.25 T
1.5 T
1.5 T
LSb
79
78
LSb In
Min
100
100
T
40
40
CY
10
CY
—
—
—
—
—
—
—
—
—
—
CY
CY
CY
83
+ 40
+ 40
+ 30
+ 30
2002 Microchip Technology Inc.
77
Max
150
25
60
25
60
50
25
60
25
60
50
—
—
—
—
—
—
—
—
—
Units Conditions
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
(Note 1)
(Note 1)
(Note 2)
V
V
V
V
V
DD
DD
DD
DD
DD
= 2V
= 2V
= 2V
= 2V
= 2V
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