PIC18F4439-E/P Microchip Technology, PIC18F4439-E/P Datasheet - Page 45
PIC18F4439-E/P
Manufacturer Part Number
PIC18F4439-E/P
Description
IC PIC MCU FLASH 6KX16 40DIP
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC18F2439-ISO.pdf
(322 pages)
3.PIC18F2439-ISO.pdf
(6 pages)
4.PIC18F2439-ISO.pdf
(34 pages)
Specifications of PIC18F4439-E/P
Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
32
Program Memory Size
12KB (6K x 16)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
640 x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
40-DIP (0.600", 15.24mm)
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
640 B
Interface Type
I2C, SPI, AUSART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
32
Number Of Timers
16 bit
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
Through Hole
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
DV164005, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
8
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18F4439-E/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
- PIC16F616T-ISL PDF datasheet
- PIC18F2439-ISO PDF datasheet #2
- PIC18F2439-ISO PDF datasheet #3
- PIC18F2439-ISO PDF datasheet #4
- Current page: 45 of 322
- Download datasheet (7Mb)
TABLE 4-2:
2002 Microchip Technology Inc.
TOSU
TOSH
TOSL
STKPTR
PCLATU
PCLATH
PCL
TBLPTRU
TBLPTRH
TBLPTRL
TABLAT
PRODH
PRODL
INTCON
INTCON2
INTCON3
INDF0
POSTINC0
POSTDEC0
PREINC0
PLUSW0
FSR0H
FSR0L
WREG
INDF1
POSTINC1
POSTDEC1
PREINC1
PLUSW1
FSR1H
FSR1L
BSR
INDF2
POSTINC2
POSTDEC2
PREINC2
PLUSW2
FSR2H
FSR2L
STATUS
Legend:
Note 1:
File Name
2: Bit 21 of the TBLPTRU allows access to the device configuration bits.
3: These registers and bits are reserved on the PIC18F2X39 devices; always maintain these clear.
*
x = unknown, u = unchanged, - = unimplemented, q = value depends on condition
These registers (or individual bits) are retained to maintain compatibility with PIC18FXX2 devices; however, the indicated bits are
reserved in PIC18FXX39 devices. Users should not alter the values of these bits. See Section 4.9.2 for details.
RA6 and associated bits are configured as port pins in RCIO and ECIO Oscillator mode only and read '0' in all other Oscillator modes.
Top-of-Stack High Byte (TOS<15:8>)
Top-of-Stack Low Byte (TOS<7:0>)
Holding Register for PC<15:8>
PC Low Byte (PC<7:0>)
Program Memory Table Pointer High Byte (TBLPTR<15:8>)
Program Memory Table Pointer Low Byte (TBLPTR<7:0>)
Program Memory Table Latch
Product Register High Byte
Product Register Low Byte
Uses contents of FSR0 to address data memory - value of FSR0 not changed (not a physical register)
Uses contents of FSR0 to address data memory - value of FSR0 post-incremented (not a physical register)
Uses contents of FSR0 to address data memory - value of FSR0 post-decremented (not a physical register)
Uses contents of FSR0 to address data memory - value of FSR0 pre-incremented (not a physical register)
Uses contents of FSR0 to address data memory - value of FSR0 (not a physical register).
Offset by value in WREG.
Indirect Data Memory Address Pointer 0 Low Byte
Working Register
Uses contents of FSR1 to address data memory - value of FSR1 not changed (not a physical register)
Uses contents of FSR1 to address data memory - value of FSR1 post-incremented (not a physical register)
Uses contents of FSR1 to address data memory - value of FSR1 post-decremented (not a physical register)
Uses contents of FSR1 to address data memory - value of FSR1 pre-incremented (not a physical register)
Uses contents of FSR1 to address data memory - value of FSR1 (not a physical register).
Offset by value in WREG.
Indirect Data Memory Address Pointer 1 Low Byte
Uses contents of FSR2 to address data memory - value of FSR2 not changed (not a physical register)
Uses contents of FSR2 to address data memory - value of FSR2 post-incremented (not a physical register)
Uses contents of FSR2 to address data memory - value of FSR2 post-decremented (not a physical register)
Uses contents of FSR2 to address data memory - value of FSR2 pre-incremented (not a physical register)
Uses contents of FSR2 to address data memory - value of FSR2 (not a physical register).
Offset by value in WREG.
Indirect Data Memory Address Pointer 2 Low Byte
GIE/GIEH
STKFUL
INT2IP
RBPU
Bit 7
—
—
—
—
—
—
—
—
REGISTER FILE SUMMARY
PEIE/GIEL
INTEDG0
STKUNF
INT1IP
Bit 6
—
—
—
—
—
—
—
—
INTEDG1
TMR0IE
bit21
Bit 5
—
—
—
—
—
—
—
—
—
(2)
Top-of-Stack Upper Byte (TOS<20:16>)
Return Stack Pointer
Holding Register for PC<20:16>
Program Memory Table Pointer Upper Byte (TBLPTR<20:16>) --00 0000
INTEDG2
INT0IE
INT2IE
Bit 4
—
—
—
—
N
Preliminary
Indirect Data Memory Address Pointer 0 High Byte ---- 0000
Indirect Data Memory Address Pointer 1 High Byte ---- 0000
Bank Select Register
Indirect Data Memory Address Pointer 2 High Byte ---- 0000
INT1IE
RBIE
Bit 3
OV
—
TMR0IF
TMR0IP
Bit 2
—
Z
INT0IF
INT2IF
Bit 1
DC
—
PIC18FXX39
INT1IF
RBIF
RBIP
Bit 0
C
---0 0000
0000 0000
0000 0000
00-0 0000
---0 0000
0000 0000
0000 0000
0000 0000
0000 0000
0000 0000
xxxx xxxx
xxxx xxxx
0000 000x
1111 -1-1
11-0 0-00
xxxx xxxx
xxxx xxxx
xxxx xxxx
---- 0000
xxxx xxxx
---x xxxx
POR, BOR
DS30485A-page 43
Value on
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
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