AT89C5131A-PLTIL Atmel, AT89C5131A-PLTIL Datasheet - Page 119

IC 8051 MCU FLASH 32K USB 48QFN

AT89C5131A-PLTIL

Manufacturer Part Number
AT89C5131A-PLTIL
Description
IC 8051 MCU FLASH 32K USB 48QFN
Manufacturer
Atmel
Series
AT89C513xr
Datasheets

Specifications of AT89C5131A-PLTIL

Core Processor
C52X2
Core Size
8-Bit
Speed
48MHz
Connectivity
I²C, SPI, UART/USART, USB
Peripherals
LED, POR, PWM, WDT
Number Of I /o
34
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
1.25K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-VQFN Exposed Pad, 48-HVQFN, 48-SQFN, 48-DHVQFN
For Use With
AT89STK-10 - KIT EVAL APPL MASS STORAGEAT89STK-05 - KIT STARTER FOR AT89C5131
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Data Converters
-
Other names
AT89C5131-PLTIL
Configuration
General Configuration
Endpoint Configuration
Figure 60. Endpoint Selection
4338F–USB–08/07
Endpoint 0
Endpoint 6
UEPSTA0
UEPSTA6
UBYCTH0
UBYCTH6
UEPCON0
UEPCON6
USB controller enable
Before any USB transaction, the 48 MHz required by the USB controller must be
correctly generated (See “Clock Controller” on page 13.).
The USB controller will be then enabled by setting the EUSB bit in the USBCON
register.
Set address
After a Reset or a USB reset, the software has to set the FEN (Function Enable) bit
in the USBADDR register. This action will allow the USB controller to answer to the
requests sent at the address 0.
When a SET_ADDRESS request has been received, the USB controller must only
answer to the address defined by the request. The new address will be stored in the
USBADDR register. The FEN bit and the FADDEN bit in the USBCON register will
be set to allow the USB controller to answer only to requests sent at the new
address.
Set configuration
T h e C O N F G b i t i n t h e U S B C O N r e g i s t e r h a s t o b e s e t a f t e r a
SET_CONFIGURATION request with a non-zero value. Otherwise, this bit has to be
cleared.
Selection of an Endpoint
The endpoint register access is performed using the UEPNUM register. The
registers
These registers correspond to the endpoint whose number is stored in the UEP-
NUM register. To select an Endpoint, the firmware has to write the endpoint number
in the UEPNUM register.
UBYCTL0
UBYCTL6
UEPSTAX
UEPCONX
UEPDATX
UBYCTLX
UBYCTHX
UEPDAT0
UEPDAT6
UEPNUM
0
1
2
3
4
5
6
X
UEPSTAX
UBYCTHX
SFR registers
UEPCONX
UBYCTLX
UEPDATX
119

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