ATMEGA64-16MJ Atmel, ATMEGA64-16MJ Datasheet - Page 147

• Manufacturer Part Number: ATMEGA64-16MJ
• Description: IC MCU AVR 64K 5V 16MHZ 64-QFN
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA64-16MJ

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 53
• Program Memory Size: 64KB (32K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 2K x 8
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-MLF®, 64-QFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Definitions
Timer/Counter
Clock Sources
2490Q–AVR–06/10
ate a PWM or variable frequency output on the Output Compare pin (OC2). For details, see
“Output Compare Unit” on page 148. The Compare Match event will also set the Compare Flag
(OCF2) which can be used to generate an Output Compare interrupt request.
Many register and bit references in this document are written in general form. A lower case “n”
replaces the Timer/Counter number, in this case 2. However, when using the register or bit
defines in a program, the precise form must be used (that is, TCNT2 for accessing
Timer/Counter2 counter value and so on).
The definitions in
Table 63. Definitions
The Timer/Counter can be clocked by an internal or an external clock source. The clock source
is selected by the Clock Select logic which is controlled by the Clock Select (CS22:0) bits
located in the Timer/Counter Control Register (TCCR2). For details on clock sources and pres-
caler, see
BOTTOM
MAX
TOP
“Timer/Counter3, Timer/Counter2 and Timer/Counter1 Prescalers” on page
The counter reaches the BOTTOM when it becomes 0x00.
The counter reaches its MAXimum when it becomes 0xFF (decimal 255).
The counter reaches the TOP when it becomes equal to the highest
value in the count sequence. The TOP value can be assigned to be the
fixed value 0xFF (MAX) or the value stored in the OCR2 Register. The
assignment is dependent on the mode of operation.
Table 63
are also used extensively throughout this section.
ATmega64(L)
144.
147