ATMEGA169V-8AI SL709 Atmel, ATMEGA169V-8AI SL709 Datasheet - Page 221

• Manufacturer Part Number: ATMEGA169V-8AI SL709
• Description: IC AVR MCU 16K 8MHZ 1.8V 64TQFP
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA169V-8AI SL709

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: SPI, UART/USART, USI
• Peripherals: Brown-out Detect/Reset, LCD, POR, PWM, WDT
• Number Of I /o: 54
• Program Memory Size: 16KB (8K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-TQFP, 64-VQFP
• For Use With: ATAVRBFLY - KIT EVALUATION AVR BUTTERFLYATSTK502 - MOD EXPANSION AVR STARTER 500
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: ATMEGA169V8ASL709

LCD Frame Rate Register –
LCDFRR
2514P–AVR–07/06
Table 94. LCD Duty Select
Note:
• Bit3 – Res: Reserved Bit
This bit is reserved bit in the ATmega169 and will always read as zero.
• Bits 2:0 – LCDPM2:0: LCD Port Mask
The LCDPM2:0 bits determine the number of port pins to be used as segment drivers.
The different selections are shown in Table 95. Unused pins can be used as ordinary
port pins.
Table 95. LCD Port Mask
• Bit 7 – Res: Reserved Bit
This bit is reserved bit in the ATmega169 and will always read as zero.
• Bits 6:4 – LCDPS2:0: LCD Prescaler Select
The LCDPS2:0 bits selects tap point from a prescaler. The prescaled output can be fur-
ther divided by setting the clock divide bits (LCDCD2:0). The different selections are
shown in Table 96. Together they determine the prescaled LCD clock (clk
is clocking the LCD module.
Bit
Read/Write
Initial Value
LCDMUX1
LCDPM2
0
0
0
0
1
1
1
1
0
0
1
1
1. 1/2 bias when LCD2B is written to one and 1/3 otherwise.
LCDMUX0
LCDPM1
R
7
–
0
0
0
1
1
0
0
1
1
0
1
0
1
LCDPS2
R/W
6
0
LCDPM0
Static
LCDPS1
Duty
1/2
1/3
1/4
0
1
0
1
0
1
0
1
R/W
5
0
LCDPS0
R/W
1/2 or 1/3
1/2 or 1/3
1/2 or 1/3
4
0
I/O Port in Use as
Static
Segment Driver
Bias
SEG0:12
SEG0:14
SEG0:16
SEG0:18
SEG0:20
SEG0:22
SEG0:23
SEG0:24
R
(1)
(1)
(1)
3
–
0
LCDCD2
COM Pin
COM0:1
COM0:2
COM0:3
R/W
COM0
2
0
ATmega169/V
LCDCD1
R/W
Maximum Number of
1
0
Segments
I/O Port Pin
LCDCD0
COM1:3
COM2:3
R/W
LCD_PS
COM3
None
0
0
13
15
17
19
21
23
24
25
), which
LCDFRR
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