DSPIC30F6011A-20I/PT Microchip Technology, DSPIC30F6011A-20I/PT Datasheet - Page 54
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DSPIC30F6011A-20I/PT
Manufacturer Part Number
DSPIC30F6011A-20I/PT
Description
IC DSPIC MCU/DSP 132K 64TQFP
Manufacturer
Microchip Technology
Series
dsPIC™ 30Fr
Datasheets
1.DSPIC30F2011-20ISO.pdf
(66 pages)
2.DSPIC30F6011A-30IPT.pdf
(234 pages)
3.DSPIC30F6011A-30IPT.pdf
(8 pages)
4.DSPIC30F6011A-30IPT.pdf
(10 pages)
5.DSPIC30F6011A-30IPT.pdf
(6 pages)
6.DSPIC30F6011A-30IPT.pdf
(8 pages)
7.DSPIC30F6011A-30IPT.pdf
(16 pages)
8.DSPIC30F6011A-20IPT.pdf
(238 pages)
Specifications of DSPIC30F6011A-20I/PT
Core Processor
dsPIC
Core Size
16-Bit
Speed
20 MIPS
Connectivity
CAN, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
52
Program Memory Size
132KB (44K x 24)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
6K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 5.5 V
Data Converters
A/D 16x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TFQFP
For Use With
AC30F008 - MODULE SKT FOR DSPIC30F 64TQFP
Lead Free Status / RoHS Status
Request inventory verification / Request inventory verification
Other names
DSPIC30F6011A20IP
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DSPIC30F6011A-20I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
- DSPIC30F2011-20ISO PDF datasheet
- DSPIC30F6011A-30IPT PDF datasheet #2
- DSPIC30F6011A-30IPT PDF datasheet #3
- DSPIC30F6011A-30IPT PDF datasheet #4
- DSPIC30F6011A-30IPT PDF datasheet #5
- DSPIC30F6011A-30IPT PDF datasheet #6
- DSPIC30F6011A-30IPT PDF datasheet #7
- DSPIC30F6011A-20IPT PDF datasheet #8
- Current page: 54 of 234
- Download datasheet (4Mb)
dsPIC30F6011A/6012A/6013A/6014A
6.6.3
Example 6-2
be used to load the 96 bytes of write latches. 32
TBLWTL and 32 TBLWTH instructions are needed to
load the write latches selected by the table pointer.
EXAMPLE 6-2:
6.6.4
For protection, the write initiate sequence for NVMKEY
must be used to allow any erase or program operation
to proceed. After the programming command has been
EXAMPLE 6-3:
DS70143E-page 54
; Set up a pointer to the first program memory location to be written
; program memory selected, and writes enabled
; Perform the TBLWT instructions to write the latches
; 0th_program_word
; 1st_program_word
;
; 31st_program_word
Note: In
2nd_program_word
Example
DISI
MOV
MOV
MOV
MOV
BSET
NOP
NOP
MOV
MOV
MOV
MOV
MOV
TBLWTL W2
TBLWTH W3
MOV
MOV
TBLWTL W2
TBLWTH W3
MOV
MOV
TBLWTL W2
TBLWTH W3
•
•
•
MOV
MOV
TBLWTL W2
TBLWTH W3
LOADING WRITE LATCHES
INITIATING THE PROGRAMMING
SEQUENCE
shows a sequence of instructions that can
6-2, the contents of the upper byte of W3 has no effect.
#5
#0x55,W0
W0
#0xAA,W1
W1
NVMCON,#WR
#0x0000,W0
W0
#0x6000,W0
#LOW_WORD_0,W2
#HIGH_BYTE_0,W3
#LOW_WORD_1,W2
#HIGH_BYTE_1,W3
#LOW_WORD_2,W2
#HIGH_BYTE_2,W3
#LOW_WORD_31,W2
#HIGH_BYTE_31,W3
,
,
LOADING WRITE LATCHES
,
,
,
,
,
,
,
,
,
INITIATING A PROGRAMMING SEQUENCE
NVMKEY
NVMKEY
TBLPAG
[W0]
[W0++]
[W0]
[W0++]
[W0]
[W0++]
[W0]
[W0++]
; Block all interrupts with priority <7 for
; next 5 instructions
;
; Write the 0x55 key
;
; Write the 0xAA key
; Start the erase sequence
; Insert two NOPs after the erase
; command is asserted
;
; Initialize PM Page Boundary SFR
; An example program memory address
;
;
; Write PM low word into program latch
; Write PM high byte into program latch
;
;
; Write PM low word into program latch
; Write PM high byte into program latch
;
;
; Write PM low word into program latch
; Write PM high byte into program latch
;
;
; Write PM low word into program latch
; Write PM high byte into program latch
executed, the user must wait for the programming time
until programming is complete. The two instructions
following the start of the programming sequence
should be NOPs.
© 2011 Microchip Technology Inc.
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