ATMEGA165-16AI Atmel, ATMEGA165-16AI Datasheet - Page 121
![IC AVR MCU 16K 16MHZ 64TQFP](/photos/12/13/121332/313-64-tqfp_sml.jpg)
ATMEGA165-16AI
Manufacturer Part Number
ATMEGA165-16AI
Description
IC AVR MCU 16K 16MHZ 64TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Specifications of ATMEGA165-16AI
Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
SPI, UART/USART, USI
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
54
Program Memory Size
16KB (8K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TQFP, 64-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
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Definitions
Timer/Counter Clock
Sources
Counter Unit
2573G–AVR–07/09
ment) its value. The Timer/Counter is inactive when no clock source is selected. The
output from the Clock Select logic is referred to as the timer clock (clk
The double buffered Output Compare Register (OCR2A) is compared with the
Timer/Counter value at all times. The result of the compare can be used by the Wave-
form Generator to generate a PWM or variable frequency output on the Output Compare
pin (OC2A). See “Output Compare Unit” on page 122. for details. The compare match
event will also set the Compare Flag (OCF2A) which can be used to generate an Output
Compare interrupt request.
Many register and bit references in this document are written in general form. A lower
case “n” replaces the Timer/Counter number, in this case 2. However, when using the
register or bit defines in a program, the precise form must be used, i.e., TCNT2 for
accessing Timer/Counter2 counter value and so on.
The definitions in Table 53 are also used extensively throughout the section.
Table 53. Definitions
The Timer/Counter can be clocked by an internal synchronous or an external asynchro-
nous clock source. The clock source clk
When the AS2 bit in the ASSR Register is written to logic one, the clock source is taken
from the Timer/Counter Oscillator connected to TOSC1 and TOSC2. For details on
asynchronous operation, see “Asynchronous Status Register – ASSR” on page 134. For
details on clock sources and prescaler, see “Timer/Counter Prescaler” on page 138.
The main part of the 8-bit Timer/Counter is the programmable bi-directional counter unit.
Figure 54 shows a block diagram of the counter and its surrounding environment.
Figure 54. Counter Unit Block Diagram
Signal description (internal signals):
BOTTOM
MAX
TOP
count
direction
clear
clk
T2
DATA BUS
TCNTn
The counter reaches the BOTTOM when it becomes zero (0x00).
The counter reaches its MAXimum when it becomes 0xFF (decimal 255).
The counter reaches the TOP when it becomes equal to the highest
value in the count sequence. The TOP value can be assigned to be the
fixed value 0xFF (MAX) or the value stored in the OCR2A Register. The
assignment is dependent on the mode of operation.
Increment or decrement TCNT2 by 1.
Selects between increment and decrement.
Clear TCNT2 (set all bits to zero).
Timer/Counter clock.
direction
count
clear
bottom
Control Logic
T2
top
is by default equal to the MCU clock, clk
TOVn
(Int.Req.)
clk
Tn
Prescaler
ATmega165/V
T2
Oscillator
).
T/C
clk
I/O
TOSC2
TOSC1
121
I/O
.
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