ATMEGA2561V-8MI Atmel, ATMEGA2561V-8MI Datasheet - Page 194

IC AVR MCU 256K 8MHZ 64-QFN

ATMEGA2561V-8MI

Manufacturer Part Number
ATMEGA2561V-8MI
Description
IC AVR MCU 256K 8MHZ 64-QFN
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheets

Specifications of ATMEGA2561V-8MI

Core Processor
AVR
Core Size
8-Bit
Speed
8MHz
Connectivity
EBI/EMI, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
54
Program Memory Size
256KB (128K x 16)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-MLF®, 64-QFN
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATMEGA2561V-8MI
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
19.10.9
2549M–AVR–09/10
GTCCR – General Timer/Counter Control Register
• Bit 0 – TOV2: Timer/Counter2 Overflow Flag
The TOV2 bit is set (one) when an overflow occurs in Timer/Counter2. TOV2 is cleared by hard-
ware when executing the corresponding interrupt handling vector. Alternatively, TOV2 is cleared
by writing a logic one to the flag. When the SREG I-bit, TOIE2A (Timer/Counter2 Overflow Inter-
rupt Enable), and TOV2 are set (one), the Timer/Counter2 Overflow interrupt is executed. In
PWM mode, this bit is set when Timer/Counter2 changes counting direction at 0x00.
Bit
0x23 (0x43)
Read/Write
Initial Value
• Bit 1 – PSRASY: Prescaler Reset Timer/Counter2
When this bit is one, the Timer/Counter2 prescaler will be reset. This bit is normally cleared
immediately by hardware. If the bit is written when Timer/Counter2 is operating in asynchronous
mode, the bit will remain one until the prescaler has been reset. The bit will not be cleared by
hardware if the TSM bit is set. Refer to the description of the
chronization Mode” on page 170
TSM
R/W
7
0
R
6
0
ATmega640/1280/1281/2560/2561
for a description of the Timer/Counter Synchronization mode.
R
5
0
R
4
0
R
3
0
“Bit 7 – TSM: Timer/Counter Syn-
R
2
0
PSRASY
R/W
1
0
PSRSYNC
R/W
0
0
GTCCR
194

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