ATMEGA2561V-8MI Atmel, ATMEGA2561V-8MI Datasheet - Page 306

• Manufacturer Part Number: ATMEGA2561V-8MI
• Description: IC AVR MCU 256K 8MHZ 64-QFN
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA2561V-8MI

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: EBI/EMI, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 54
• Program Memory Size: 256KB (128K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-MLF®, 64-QFN
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

2549M–AVR–09/10
Control corresponds to the Data Direction - DD Register, and the Pull-up Enable - PUExn - cor-
responds to logic expression PUD · DDxn · PORTxn.
Digital alternate port functions are connected outside the dotted box in
to make the scan chain read the actual pin value. For analog function, there is a direct connec-
tion from the external pin to the analog circuit. There is no scan chain on the interface between
the digital and the analog circuitry, but some digital control signal to analog circuitry are turned
off to avoid driving contention on the pads.
When JTAG IR contains EXTEST or SAMPLE_PRELOAD the clock is not sent out on the port
pins even if the CKOUT fuse is programmed. Even though the clock is output when the JTAG IR
contains SAMPLE_PRELOAD, the clock is not sampled by the boundary scan.
Figure 27-3. Boundary-scan Cell for Bi-directional Port Pin with Pull-up Function.
Pull-up Enable (PUE)
Output Control (OC)
Output Data (OD)
Input Data (ID)
0
1
From Last Cell
ATmega640/1280/1281/2560/2561
0
1
0
1
ShiftDR
ClockDR
D
D
FF1
FF0
To Next Cell
Q
Q
UpdateDR
D
G
D
G
LD1
LD0
Q
Q
0
1
0
1
0
1
Figure 27-4 on page 307
EXTEST
Vcc
306