DSPIC30F4013T-20I/ML Microchip Technology, DSPIC30F4013T-20I/ML Datasheet - Page 58

IC DSPIC MCU/DSP 48K 44QFN

DSPIC30F4013T-20I/ML

Manufacturer Part Number
DSPIC30F4013T-20I/ML
Description
IC DSPIC MCU/DSP 48K 44QFN
Manufacturer
Microchip Technology
Series
dsPIC™ 30Fr

Specifications of DSPIC30F4013T-20I/ML

Core Processor
dsPIC
Core Size
16-Bit
Speed
20 MIPS
Connectivity
CAN, I²C, SPI, UART/USART
Peripherals
AC'97, Brown-out Detect/Reset, I²S, POR, PWM, WDT
Number Of I /o
30
Program Memory Size
48KB (16K x 24)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 5.5 V
Data Converters
A/D 13x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-QFN
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
DSPIC30F4013T20IM
dsPIC30F3014/4013
8.1
The user assignable interrupt priority (IP<2:0>) bits for
each individual interrupt source are located in the LS
3 bits of each nibble within the IPCx register(s). Bit 3 of
each nibble is not used and is read as a ‘0’. These bits
define the priority level assigned to a particular interrupt
by the user.
Natural Order Priority is determined by the position of
an interrupt in the vector table, and only affects
interrupt operation when multiple interrupts with the
same user-assigned priority become pending at the
same time.
Table 8-1 and Table 8-2 list the interrupt numbers, cor-
responding interrupt sources and associated vector
numbers for the dsPIC30F3014 and dsPIC30F4013
devices respectively.
The ability for the user to assign every interrupt to one
of seven priority levels implies that the user can assign
a very high overall priority level to an interrupt with a
low natural order priority. For example, the PLVD (Low
Voltage Detect) can be given a priority of 7. The INT0
(External Interrupt 0) may be assigned to priority level
1, thus giving it a very low effective priority.
DS70138C-page 56
Note:
Note 1: The natural order priority scheme has 0
2: The natural order priority number is the
Interrupt Priority
The user selectable priority levels start at
0 as the lowest priority and level 7 as the
highest priority.
as the highest priority and 53 as the
lowest priority.
same as the INT number.
Advance Information
TABLE 8-1:
Highest Natural Order Priority
Lowest Natural Order Priority
Number
17-22
28-41
43-53
INT
10
11
12
13
14
15
16
23
24
25
26
27
42
0
1
2
3
4
5
6
7
8
9
Number
Vector
25-30
36-49
51-61
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
31
32
33
34
35
50
8
9
dsPIC30F3014 INTERRUPT
VECTOR TABLE
INT0 - External Interrupt 0
IC1 - Input Capture 1
OC1 - Output Compare 1
T1 - Timer 1
IC2 - Input Capture 2
OC2 - Output Compare 2
T2 - Timer 2
T3 - Timer 3
SPI1
U1RX - UART1 Receiver
U1TX - UART1 Transmitter
ADC - ADC Convert Done
NVM - NVM Write Complete
SI2C - I
MI2C - I
Input Change Interrupt
INT1 - External Interrupt 1
Reserved
INT2 - External Interrupt 2
U2RX - UART2 Receiver
U2TX - UART2 Transmitter
Reserved
C1 - Combined IRQ for CAN1
Reserved
LVD - Low Voltage Detect
Reserved
 2004 Microchip Technology Inc.
2
2
Interrupt Source
C Slave Interrupt
C Master Interrupt

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