AT89C51ED2-3CSUM Atmel, AT89C51ED2-3CSUM Datasheet - Page 89
AT89C51ED2-3CSUM
Manufacturer Part Number
AT89C51ED2-3CSUM
Description
IC 8051 MCU FLASH 64K 40DIP
Manufacturer
Atmel
Series
89Cr
Datasheet
1.ATWEBDVK-02RC.pdf
(137 pages)
Specifications of AT89C51ED2-3CSUM
Core Processor
8051
Core Size
8-Bit
Speed
60MHz
Connectivity
SPI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
34
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
40-DIP (0.600", 15.24mm)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Data Converters
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23. EEPROM Data Memory
23.1
4235K–8051–05/08
Write Data
This feature is available only for the AT89C51ED2 device.
The 2K bytes on-chip EEPROM memory block is located at addresses 0000h to 07FFh of the
XRAM/ERAM memory space and is selected by setting control bits in the EECON register.
A read or write access to the EEPROM memory is done with a MOVX instruction.
Data is written by byte to the EEPROM memory block as for an external RAM memory.
The following procedure is used to write to the EEPROM memory:
Figure 23-1 represents the optimal write sequence to the on-chip EEPROM data memory.
• Check EEBUSY flag
• If the user application interrupts routines use XRAM memory space: Save and disable
• Load DPTR with the address to write
• Store A register with the data to be written
• Set bit EEE of EECON register
• Execute a MOVX @DPTR, A
• Clear bit EEE of EECON register
• Restore interrupts.
• EEBUSY flag in EECON is then set by hardware to indicate that programming is in progress
• The end of programming is indicated by a hardware clear of the EEBUSY flag.
interrupts.
and that the EEPROM segment is not available for reading or writing.
AT89C51RD2/ED2
89
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