ATMEGA649-16MI Atmel, ATMEGA649-16MI Datasheet - Page 241

• Manufacturer Part Number: ATMEGA649-16MI
• Description: IC AVR MCU FLASH 64K 5V 64QFN
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA649-16MI

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: SPI, UART/USART, USI
• Peripherals: Brown-out Detect/Reset, LCD, POR, PWM, WDT
• Number Of I /o: 53
• Program Memory Size: 64KB (32K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 2K x 8
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-MLF®, 64-QFN
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

23.4.3
2552K–AVR–04/11
LCDFRR – LCD Frame Rate Register
Table 23-3.
Note:
• Bit 7 – Reserved Bit
This bit is reserved bit in the ATmega329/3290/649/6490 and will always read as zero.
• Bits 6:4 – LCDPS2:0: LCD Prescaler Select
The LCDPS2:0 bits selects tap point from a prescaler. The prescaled output can be further
divided by setting the clock divide bits (LCDCD2:0). The different selections are shown in
23-4. Together they determine the prescaled LCD clock (clk
module.
Table 23-4.
• Bit 3 – Reserved Bit
This bit is reserved bit in the ATmega329/3290/649/6490 and will always read as zero.
• Bits 2:0 – LCDCD2:0: LCD Clock Divide 2, 1, and 0
The LCDCD2:0 bits determine division ratio in the clock divider. The various selections are
shown in
Bit
(0xE6)
Read/Write
Initial Value
LCDPM3
LCDPS2
1
1
1
0
0
0
0
1
1
1
1
1. LCDPM3 is reserved and will always read as zero in ATmega329/649.
Table
LCDPM2
LCDPS1
LCD Port Mask (Values in bold are only available in ATmega3290/6490)
LCD Prescaler Select
R
23-5. This Clock Divider gives extra flexibility in frame rate selection.
1
1
1
7
–
0
0
0
1
1
0
0
1
1
LCDPS2
R/W
LCDPM1
LCDPS0
6
0
0
1
1
0
1
0
1
0
1
0
1
LCDPS1
R/W
5
0
LCDPM0
Output from
clk
clk
clk
clk
clk
clk
Prescaler
clk
clk
clk
1
0
1
LCD
LCD
LCD
LCDPS0
LCD
LCD
LCD
LCD
LCD
R/W
LCD
4
0
/1024
/2048
/4096
/128
/256
/512
/16
/64
/N
ATmega329/3290/649/6490
I/O Port in Use as
Segment Driver
R
3
–
0
Duty = 1/4, and Frame Rate = 64 Hz
SEG0:36
SEG0:38
SEG0:39
Frequency when LCDCD2:0 = 0,
Applied Prescaled LCD Clock
LCDCD2
R/W
2
0
LCD_PS
LCDCD1
130kHz
260kHz
520kHz
R/W
8.1kHz
33kHz
66kHz
1MHz
2MHz
1
0
), which is clocking the LCD
Maximum Number
of Segments
LCDCD0
R/W
0
0
37
39
40
LCDFRR
Table
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