ATMEGA649-16MI Atmel, ATMEGA649-16MI Datasheet - Page 286

• Manufacturer Part Number: ATMEGA649-16MI
• Description: IC AVR MCU FLASH 64K 5V 64QFN
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA649-16MI

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: SPI, UART/USART, USI
• Peripherals: Brown-out Detect/Reset, LCD, POR, PWM, WDT
• Number Of I /o: 53
• Program Memory Size: 64KB (32K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 2K x 8
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-MLF®, 64-QFN
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

26.7.10
286
ATmega329/3290/649/6490
Preventing Flash Corruption
the value of the Lock bits will be loaded in the destination register. The BLBSET and SPMEN
bits will auto-clear upon completion of reading the Lock bits or if no LPM instruction is executed
within three CPU cycles or no SPM instruction is executed within four CPU cycles. When BLB-
SET and SPMEN are cleared, LPM will work as described in the Instruction set Manual.
The algorithm for reading the Fuse Low byte is similar to the one described above for reading
the Lock bits. To read the Fuse Low byte, load the Z-pointer with 0x0000 and set the BLBSET
and SPMEN bits in SPMCSR. When an LPM instruction is executed within three cycles after the
BLBSET and SPMEN bits are set in the SPMCSR, the value of the Fuse Low byte (FLB) will be
loaded in the destination register as shown below. Refer to
detailed description and mapping of the Fuse Low byte.
Similarly, when reading the Fuse High byte, load 0x0003 in the Z-pointer. When an LPM instruc-
tion is executed within three cycles after the BLBSET and SPMEN bits are set in the SPMCSR,
the value of the Fuse High byte (FHB) will be loaded in the destination register as shown below.
Refer to
When reading the Extended Fuse byte, load 0x0002 in the Z-pointer. When an LPM instruction
is executed within three cycles after the BLBSET and SPMEN bits are set in the SPMCSR, the
value of the Extended Fuse byte (EFB) will be loaded in the destination register as shown below.
Refer to
byte.
Fuse and Lock bits that are programmed, will be read as zero. Fuse and Lock bits that are
unprogrammed, will be read as one.
During periods of low V
too low for the CPU and the Flash to operate properly. These issues are the same as for board
level systems using the Flash, and the same design solutions should be applied.
A Flash program corruption can be caused by two situations when the voltage is too low. First, a
regular write sequence to the Flash requires a minimum voltage to operate correctly. Secondly,
the CPU itself can execute instructions incorrectly, if the supply voltage for executing instructions
is too low.
Flash corruption can easily be avoided by following these design recommendations (one is
sufficient):
1. If there is no need for a Boot Loader update in the system, program the Boot Loader Lock
2. Keep the AVR RESET active (low) during periods of insufficient power supply voltage.
Bit
Rd
Bit
Rd
Bit
Rd
Bit
Rd
bits to prevent any Boot Loader software updates.
This can be done by enabling the internal Brown-out Detector (BOD) if the operating volt-
age matches the detection level. If not, an external low V
Table 27-4 on page 295
Table 27-3 on page 294
FLB7
FHB7
7
7
7
–
7
–
FHB6
FLB6
CC
6
6
6
–
6
–
, the Flash program can be corrupted because the supply voltage is
BLB12
FHB5
FLB5
5
5
5
5
–
for detailed description and mapping of the Fuse High byte.
for detailed description and mapping of the Extended Fuse
BLB11
FHB4
FLB4
4
4
4
4
–
BLB02
FHB3
FLB3
3
3
3
3
–
BLB01
FLB2
FHB2
EFB2
2
2
2
2
CC
reset protection circuit can be
Table 27-5 on page 295
FLB1
FHB1
EFB1
LB2
1
1
1
1
FHB0
FLB0
EFB0
LB1
0
0
0
0
2552K–AVR–04/11
for a