P89LPC932A1FA,129 NXP Semiconductors, P89LPC932A1FA,129 Datasheet - Page 30

• Manufacturer Part Number: P89LPC932A1FA,129
• Description: IC 80C51 MCU FLASH 8K 28-PLCC
• Manufacturer: NXP Semiconductors
• Series: LPC900r

Specifications of P89LPC932A1FA,129

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 18MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LED, POR, PWM, WDT
• Number Of I /o: 26
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 2.4 V ~ 3.6 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-PLCC
• For Use With: OM6292 - DEMO BOARD PCA2125 RTCDB-TSSOP-LPC932 - BOARD FOR LPC932 TSSOP622-1014 - BOARD FOR LPC9XX TSSOP622-1008 - BOARD FOR LPC9103 10-HVSON622-1006 - SOCKET ADAPTER BOARDMCB900K - BOARD PROTOTYPE NXP 89LPC9EPM900K - EMULATOR/PROGRAMMER NXP P89LPC9622-1003 - KIT FOR LCD DEMO568-1759 - EMULATOR DEBUGGER/PROGRMMR LPC9X568-1758 - BOARD EVAL FOR LPC93X MCU FAMILY
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Other names: 568-1285-5; 935276131129; P89LPC932A1FA-S

NXP Semiconductors
P89LPC932A1_3
Product data sheet
Fig 12. Capture/compare unit interrupts
TOCIE2A (TICR2.3)
TOCIE2B (TICR2.4)
TOCIE2C (TICR2.5)
TOCIE2D (TICR2.6)
TOCF2C (TIFR2.5)
TOCF2D (TIFR2.6)
TICIE2A (TICR2.0)
TICIE2B (TICR2.1)
TOCF2A (TIFR2.3)
TOCF2B (TIFR2.4)
TICF2A (TIFR2.0)
TICF2B (TIFR2.1)
7.19.9 CCU interrupts
7.20.1 Mode 0
7.20.2 Mode 1
TOIE2 (TICR2.7)
TOIF2 (TIFR2.7)
ECCU (IEN1.4)
7.20 UART
EA (IEN0.7)
There are seven interrupt sources on the CCU which share a common interrupt vector.
The P89LPC932A1 has an enhanced UART that is compatible with the conventional
80C51 UART except that Timer 2 overflow cannot be used as a baud rate source. The
P89LPC932A1 does include an independent Baud Rate Generator. The baud rate can be
selected from the oscillator (divided by a constant), Timer 1 overflow, or the independent
Baud Rate Generator. In addition to the baud rate generation, enhancements over the
standard 80C51 UART include Framing Error detection, automatic address recognition,
selectable double buffering and several interrupt options. The UART can be operated in
four modes: shift register, 8-bit UART, 9-bit UART, and CPU clock/32 or CPU clock/16.
Serial data enters and exits through RXD. TXD outputs the shift clock. 8 bits are
transmitted or received, LSB first. The baud rate is fixed at
frequency.
10 bits are transmitted (through TXD) or received (through RXD): a start bit (logic 0),
8 data bits (LSB first), and a stop bit (logic 1). When data is received, the stop bit is stored
in RB8 in Special Function Register SCON. The baud rate is variable and is determined
by the Timer 1 overflow rate or the Baud Rate Generator (described in
“Baud rate generator and
Rev. 03 — 12 March 2007
8-bit microcontroller with accelerated two-clock 80C51 core
selection”).
ENCODER
PRIORITY
interrupt
sources
other
1
P89LPC932A1
16
of the CPU clock
002aaa896
interrupt to
CPU
ENCINT.0
ENCINT.1
ENCINT.2
Section 7.20.5
© NXP B.V. 2007. All rights reserved.
30 of 64