SX28AC/SS Parallax Inc, SX28AC/SS Datasheet - Page 15

• Manufacturer Part Number: SX28AC/SS
• Description: IC MCU 2K FLASH 50MHZ 28SSOP
• Manufacturer: Parallax Inc
• Series: SXr

Specifications of SX28AC/SS

• Core Processor: RISC
• Core Size: 8-Bit
• Speed: 75MHz
• Peripherals: Brown-out Detect/Reset, POR, WDT
• Number Of I /o: 20
• Program Memory Size: 3KB (2K x 12)
• Program Memory Type: FLASH
• Ram Size: 136 x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 28-SSOP
• Product: Microcontroller Basic Stamps
• Flash: 2 KBytes
• Timers: 8 bit
• Operating Supply Voltage: 3 to 5.5 V
• Eeprom Size: -
• Data Converters: -
• Connectivity: -
• Lead Free Status / Rohs Status: No RoHS Version Available

Parallax SX20AC/SX28AC
5.0
The SX device has three registers (FUSE, FUSEX,
DEVICE) that control functions such as operating the
device in Turbo mode, extended (8-level deep) stack
operation, and speed selection for the internal RC
oscillator. These registers are not programmable “on the
5.1.
TURBO
DIV1: DIV0
IFBD
CP
FOSC2: FOSC0 External oscillator configuration (valid when IRC = 1):
© Parallax Inc.
SYNC
IRC
WDTE Watchdog timer enable:
TURBO
Bit 11
DEVICE CONFIGURATION REGISTERS
FUSE Word (Read/Program at FFFh in Main Memory Map)
SYNC
Turbo mode enable:
0 = turbo (instruction clock = osc/1)
1 = instr clock = osc/4
Synchronous input enable (for turbo mode): This bit synchronizes the signal presented at the input pin to
the internal clock through two internal flip-flops.
0 = enabled
1 = disabled
Internal RC oscillator enable:
0 = enabled - OSC1 pulled low by weak pullup, OSC2 pulled high by weak pullup
1 = disabled - OSC1 and OSC2 behave according to FOSC2: FOSC0
Internal RC oscillator divider:
00b = 4 MHz
01b = 1 MHz
10 = 128 KHz
11b = 32 KHz
Internal crystal/resonator oscillator feedback resistor (1 MΩ :
0 = disabled
Internal feedback resistor disable (external feedback required)
1= enabled
Code protect enable:
0 = enabled (FUSE, code, and ID memories read back as garbled data)
1 = disabled (FUSE, code, and ID memories can be read normally)
0 = disabled
1 = enabled
000b = LP1 - low power crystal (32KHz)
001b = LP2 - low power crystal/resonator (32 KHz to 1 MHz)
010b = XT1 - normal crystal/resonator (32 kHz to 10 MHz)
011b = XT2 - normal crystal/resonator (1MHz to 24 MHz)
100b = HS1 - high speed crystal/resonator/external crystal oscillator (1MHz to 50 MHz)
101b = HS2 - high speed crystal/resonator/external crystal oscillator (1 MHz to 50 MHz)
110b = HS3 - high speed crystal/resonator/external crystal oscillator (1 MHz to 75 MHz)
111b = RC network - OSC2 is pulled high with a weak pullup (no CLKOUT output)
Note: The frequencies are target values.
Reserved
Reserved
Internal feedback resistor enabled (valid when IRC = 1)
IRC
Page 15 of 51
DIV1/
IFBD
FOSC2
fly” during normal device operation. Instead, the FUSE
and FUSEX registers can only be accessed when the SX
device is being programmed. The DEVICE register is a
read-only, hard-wired register, programmed during the
manufacturing process.
DIV0/
Reserved
CP
WDTE
Rev 1.6 11/20/2006
FOSC1
www.parallax.com
FOSC0
Bit 0