Z8F0812SJ020EC Zilog, Z8F0812SJ020EC Datasheet - Page 93
Z8F0812SJ020EC
Manufacturer Part Number
Z8F0812SJ020EC
Description
IC ENCORE MCU FLASH 8K 28SOIC
Manufacturer
Zilog
Series
Encore!® XP®r
Datasheet
1.Z8F08200100KIT.pdf
(264 pages)
Specifications of Z8F0812SJ020EC
Core Processor
Z8
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, IrDA, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
19
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
28-SOIC (7.5mm Width)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Data Converters
-
Other names
269-3228
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Table 43. Timer 0–1 PWM High Byte Register (TxPWMH)
Table 44. Timer 0–1 PWM Low Byte Register (TxPWML)
Table 45. Timer 0–3 Control 0 Register (TxCTL0)
PS022517-0508
BITS
FIELD
RESET
R/W
ADDR
BITS
FIELD
RESET
R/W
ADDR
BITS
FIELD
RESET
R/W
ADDR
Timer 0–3 Control 0 Registers
7
7
7
PWMH and PWML—Pulse-Width Modulator High and Low Bytes
These two bytes, {PWMH[7:0], PWML[7:0]}, form a 16-bit value that is compared to the
current 16-bit timer count. When a match occurs, the PWM output changes state. The
PWM output value is set by the TPOL bit in the Timer Control Register (TxCTL) register.
The TxPWMH and TxPWML registers also store the 16-bit captured timer value when
operating in CAPTURE or CAPTURE/COMPARE modes.
The Timer 0–3 Control 0 (TxCTL0) registers
CSC—Cascade Timers
0 = Timer Input signal comes from the pin.
1 = For Timer 0, input signal is connected to Timer 1 output.
For Timer 1, input signal is connected to Timer 0 output.
6
Reserved
6
6
5
5
5
F06H, F0EH, F16H, F1EH
4
CSC
4
4
F04H, F0CH
F05H, F0DH
PWMH
PWML
R/W
R/W
R/W
0
0
0
3
(Table
3
3
45) allow cascading of the Timers.
2
Z8 Encore! XP
2
2
Reserved
Product Specification
1
1
1
®
F0822 Series
0
0
0
Timers
80
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