STR911FM44X6 STMicroelectronics, STR911FM44X6 Datasheet - Page 17

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STR911FM44X6

Manufacturer Part Number
STR911FM44X6
Description
MCU 512K FLASH 96K SRAM USB CAN
Manufacturer
STMicroelectronics
Series
STR9r
Datasheet

Specifications of STR911FM44X6

Core Processor
ARM9
Core Size
32-Bit
Speed
96MHz
Connectivity
CAN, I²C, Microwire, SPI, SSP, UART/USART, USB
Peripherals
Brown-out Detect/Reset, DMA, Motor Control PWM, POR, PWM, WDT
Number Of I /o
40
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
96K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 2 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
80-LQFP
For Use With
MCBSTR9UME - BOARD EVAL MCBSTR9 + ULINK-MEMCBSTR9U - BOARD EVAL MCBSTR9 + ULINK2MCBSTR9 - BOARD EVAL STM STR9 SERIES
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Other names
497-5061
497-5061-2
497-5061-2
STR911FM44X6T

Available stocks

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Part Number:
STR911FM44X6
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STR91xF
2.11
2.11.1 Run mode
2.11.2 Idle mode
Note:
2.11.3 Sleep mode
Flexible power management
The STR91xF offers configurable and flexible power management control that allows the user
to choose the best power option to fit the application. Power consumption can be dynamically
managed by firmware and hardware to match the system’s requirements. Power management
is provided via clock control to the CPU and individual peripherals.
Clocks to the CPU and peripherals can be individually divided and gated off as needed. In
addition to individual clock divisors, the CCU master clock source going to the CPU, AHB, APB,
EMI, and FMI can be divided dynamically by as much as 1024 for low power operation.
Additionally, the CCU may switch its input to the 32.768 kHz RTC clock at any time for low
power.
The STR91xF supports the following three global power control modes:
A special mode is used when JTAG debug is active which never gates off any clocks even if the
CPU enters Idle or Sleep mode.
This is the default mode after any reset occurs. Firmware can gate off or scale any individual
clock. Also available is a special Interrupt Mode which allows the CPU to automatically run full
speed during an interrupt service and return back to the selected CPU clock divisor rate when
the interrupt has been serviced. The advantage here is that the CPU can run at a very low
frequency to conserve power until a periodic wake-up event or an asynchronous interrupt
occurs at which time the CPU runs full speed immediately.
In this mode the CPU suspends code execution and the CPU and FMI clocks are turned off
immediately after firmware sets the Idle Bit. Various peripherals continue to run based on the
settings of the mask registers that exist just prior to entering Idle Mode. There are 3 ways to exit
Idle Mode and return to Run Mode:
It is possible to remain in Idle Mode for the majority of the time and the RTC can be
programmed to periodically wake up to perform a brief task or check status.
In this mode all clock circuits except the RTC are turned off and main oscillator input pins
X1_CPU and X2_CPU are disabled. The RTC clock is required for the CPU to exit Sleep Mode.
The entire chip is quiescent (except for RTC and wake-up circuitry). There are three means to
exit Sleep Mode and re-start the system:
Run Mode: All clocks are on with option to gate individual clocks off via clock mask
registers.
Idle Mode: CPU and FMI clocks are off until an interrupt, reset, or wake-up occurs. Pre-
configured clock mask registers selectively allow individual peripheral clocks to continue
run during Idle Mode.
Sleep Mode: All clocks off except RTC clock. Wake up unit remains powered, PLL is
forced off.
Any reset (external reset pin, watchdog, low-voltage, power-up, JTAG debug command)
Any interrupt (external, internal peripheral, RTC alarm or interval)
Input from wake-up unit on GPIO pins
Functional overview
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