ZLF645E0H2864G Zilog, ZLF645E0H2864G Datasheet - Page 45

• Manufacturer Part Number: ZLF645E0H2864G
• Description: IC MCU 64K FLASH 1K RAM 28-SSOP
• Manufacturer: Zilog
• Series: Crimzon™ ZLFr

Specifications of ZLF645E0H2864G

• Core Processor: Z8 LXMC
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: UART/USART
• Peripherals: Brown-out Detect/Reset, HLVD, POR, WDT
• Number Of I /o: 24
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 1.9 V ~ 3.6 V
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 28-SSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Oscillator Type: -
• Other names: 269-4719

Table 21. Port 3 Register (P3)
PS026407-0408
Bit
Field
Reset
R/W
Address
Bit Position
[7]
[6]
[5]
[4]
Port 3 Register
The Port 3 register (see
write access to the port pins P37 through P34.
R/W
Value
P37
Write
Write
Write
Write
7
0
0
1
0
1
0
1
0
1
Description
Port 3, Pin 7 Output—Writes to this bit do not affect the pin state if write-only
register bit PCON[0] is set to1, which configures P37 as the
Comparator 1 or IR Amplifier output.
P37 asserted Low if PCON[0]=0.
P37 asserted High if PCON[0]=0.
A read returns the last value written to this bit.
Port 3, Pin 6 Output—Writes to this bit do not affect the pin state if register bits
CTR1[7:6]=01, which configures P36 as the Timer 8 and Timer 16 combined
logic output.
P36 asserted Low.
P36 asserted High.
A read returns the last value written to this bit.
Port 3, Pin 5 Output—Writes to this bit do not affect the pin state if register bit
CTR2[0]=1, which configures P35 as the Timer 16 output.
P35 asserted Low.
P35 asserted High.
A read returns the last value written to this bit.
Port 3, Pin 4 Output—Writes to this bit do not affect the pin state if write only
register bit PCON[0]=1 which configures P34 as a Comparator 2 output, register
bit CTR0[0]=1 which configures P34 as Timer 8 output, or if the device is in ICP
mode as described in the
P34 asserted Low.
P34 asserted High.
A read returns the last value written to this bit.
R/W
P36
6
0
R/W
P35
Table
5
0
Banks 0–3: 03h; Linear: 003h
21) allows read access to port pins P33 through P30 and
R/W
P34
ICP Interface
4
0
R/W
P33
X
3
on page 53.
ZLF645 Series Flash MCUs
R/W
P32
X
2
Product Specification
R/W
P31
X
1
Port 3 Register
R/W
P30
X
0
37