MC68HC705P6ACDW Freescale Semiconductor, MC68HC705P6ACDW Datasheet - Page 23

• Manufacturer Part Number: MC68HC705P6ACDW
• Description: IC MCU 2.1MHZ 4.5K OTP 28-SOIC
• Manufacturer: Freescale Semiconductor
• Series: HC05r

Specifications of MC68HC705P6ACDW

• Core Processor: HC05
• Core Size: 8-Bit
• Speed: 2.1MHz
• Connectivity: SIO
• Peripherals: POR, WDT
• Number Of I /o: 21
• Program Memory Size: 4.5KB (4.5K x 8)
• Program Memory Type: OTP
• Ram Size: 176 x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 4x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-SOIC (7.5mm Width)
• Data Bus Width: 8 bit
• Data Ram Size: 176 B
• Maximum Clock Frequency: 2.1 MHz
• Number Of Programmable I/os: 37
• Number Of Timers: 16 bit
• Operating Supply Voltage: 3.3 V to 5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8 bit
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: No RoHS Version Available

Freescale Semiconductor
$000D
$000E
$000F
$0010
$0011
$0012
$0013
$0014
$0015
$0016
$0017
$0018
$0019
$001A
Addr.
Timer Register LSB (TRL)
Input Capture Register
Input Capture Register
Timer Control Register
Register MSB (OCRH)
Register MSB (ATRH)
Timer Status Register
Register LSB (OCRL)
Timer Register MSB
Reserved for Test
Output Compare
Output Compare
Register Name
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Alternate Timer
See page 47.
See page 48.
See page 50.
See page 50.
See page 50.
See page 50.
See page 49.
See page 49.
See page 49.
MSB (ICRH)
LSB (ICRL)
Figure 2-3. I/O and Control Register Summary (Sheet 2 of 3)
(TCR)
(TSR)
(TRH)
MC68HC705P6A Advance Information Data Sheet, Rev. 2.1
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Read:
Write:
Read:
Write:
Read:
Write:
Read:
Write:
Read:
Write:
Read:
Write:
Read:
Write:
Read:
Write:
Read:
Write:
OCRH7
ACRH7
OCRL7
ICRH7
ICRL7
TRH7
TRL7
Bit 7
ICIE
ICF
R
U
0
1
1
1
= Unimplemented
OCRH6
OCRL6
ACRH6
ICRH6
ICRL6
TRH6
OCIE
TRL6
OCF
R
U
6
0
1
1
1
OCRH5
OCRL5
ACRH5
ICRH5
ICRL5
TRH5
TRL5
TOIE
TOF
R
U
5
0
1
1
1
OCRH4
OCRL4
ACRH4
ICRH4
Unaffected by reset
ICRL4
Unaffected by reset
Unaffected by reset
Unaffected by reset
TRH4
TRL4
R
R
4
0
0
0
0
1
1
1
= Reserved
OCRH3
ACRH3
OCRL3
ICRH3
ICRL3
TRH3
TRL3
R
3
0
0
0
0
1
1
1
OCRH2
OCRL2
ACRH2
ICRH2
ICRL2
TRH2
TRL2
R
2
0
0
0
0
1
1
1
U = Undetermined
OCRH1
ACRH1
OCRL1
ICRH1
ICRL1
TRH1
IEDG
TRL1
R
U
1
0
0
1
0
1
EPROM/ROM
OCRH0
OCRL0
ACRH0
ICRH0
ICRL0
OLVL
TRH0
TRL0
Bit 0
R
0
0
0
1
0
1
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