MC68HC705P6ACDW Freescale Semiconductor, MC68HC705P6ACDW Datasheet - Page 71

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MC68HC705P6ACDW

Manufacturer Part Number
MC68HC705P6ACDW
Description
IC MCU 2.1MHZ 4.5K OTP 28-SOIC
Manufacturer
Freescale Semiconductor
Series
HC05r
Datasheet

Specifications of MC68HC705P6ACDW

Core Processor
HC05
Core Size
8-Bit
Speed
2.1MHz
Connectivity
SIO
Peripherals
POR, WDT
Number Of I /o
21
Program Memory Size
4.5KB (4.5K x 8)
Program Memory Type
OTP
Ram Size
176 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 4x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-SOIC (7.5mm Width)
Data Bus Width
8 bit
Data Ram Size
176 B
Maximum Clock Frequency
2.1 MHz
Number Of Programmable I/os
37
Number Of Timers
16 bit
Operating Supply Voltage
3.3 V to 5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
8 bit
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Lead Free Status / Rohs Status
No RoHS Version Available

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Chapter 13
Instruction Set
13.1 Introduction
The MCU instruction set has 62 instructions and uses eight addressing modes. The instructions include
all those of the M146805 CMOS Family plus one more: the unsigned multiply (MUL) instruction. The MUL
instruction allows unsigned multiplication of the contents of the accumulator (A) and the index register (X).
The high-order product is stored in the index register, and the low-order product is stored in the
accumulator.
13.2 Addressing Modes
The CPU uses eight addressing modes for flexibility in accessing data. The addressing modes provide
eight different ways for the CPU to find the data required to execute an instruction. The eight addressing
modes are:
13.2.1 Inherent
Inherent instructions are those that have no operand, such as return from interrupt (RTI) and stop (STOP).
Some of the inherent instructions act on data in the CPU registers, such as set carry flag (SEC) and
increment accumulator (INCA). Inherent instructions require no operand address and are one byte long.
13.2.2 Immediate
Immediate instructions are those that contain a value to be used in an operation with the value in the
accumulator or index register. Immediate instructions require no operand address and are two bytes long.
The opcode is the first byte, and the immediate data value is the second byte.
13.2.3 Direct
Direct instructions can access any of the first 256 memory locations with two bytes. The first byte is the
opcode, and the second is the low byte of the operand address. In direct addressing, the CPU
automatically uses $00 as the high byte of the operand address.
Freescale Semiconductor
Inherent
Immediate
Direct
Extended
Indexed, no offset
Indexed, 8-bit offset
Indexed, 16-bit offset
Relative
MC68HC705P6A Advance Information Data Sheet, Rev. 2.1
71

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