MC68HC711E20CFN3 Freescale Semiconductor, MC68HC711E20CFN3 Datasheet - Page 293
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MC68HC711E20CFN3
Manufacturer Part Number
MC68HC711E20CFN3
Description
IC MCU 3MHZ 20K OTP 52-PLCC
Manufacturer
Freescale Semiconductor
Series
HC11r
Specifications of MC68HC711E20CFN3
Core Processor
HC11
Core Size
8-Bit
Speed
3MHz
Connectivity
SCI, SPI
Peripherals
POR, WDT
Number Of I /o
38
Program Memory Size
20KB (20K x 8)
Program Memory Type
OTP
Eeprom Size
512 x 8
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
52-PLCC
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
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TxD Pin
AN1060 — Rev. 1.0
MOTOROLA
without resulting in output driver conflicts. It may be important to
consider what the existing logic will do with the SCI serial data instead
of the signals that would have been produced by the PD0 pin. In systems
where the PD0 pin is used normally as a general-purpose input, the
driver circuit that drives the PD0 pin must be designed so that the serial
data can override this driver, or the driver must be disconnected during
the bootstrap download. A simple series resistor between the driver and
the PD0 pin solves this problem as shown in
from the host computer can then be connected to the PD0/RxD pin, and
the series resistor will prevent direct conflict between the host driver and
the normal PD0 driver.
The bootloader program uses the PD1/TxD pin to send verification data
back to the host computer. To minimize the possibility of conflicts with
circuitry connected to this pin, port D is configured for wire-OR mode by
the bootloader program during initialization. Since the wire-OR
configuration prevents the pin from driving active high levels, a pullup
resistor to V
In systems where the PD1/TxD pin is normally used as a general-
purpose output, there are no output driver conflicts. It may be important
to consider what the existing logic will do with the SCI serial data instead
of the signals that would have been produced by the PD1 pin.
In systems where the PD1 pin is normally used as a general-purpose
input, the driver circuit that drives the PD1 pin must be designed so that
the PD1/TxD pin driver in the MCU can override this driver. A simple
series resistor between the driver and the PD1 pin can solve this
problem. The TxD pin can then be configured as an output, and the
DD
is needed if the TxD signal is used.
CONTROL
EXISTING
SYSTEM
Figure 5. Preventing Driver Conflict
SIGNAL
FROM
HOST
EXISTING
SHIFTER
DRIVER
RS232
LEVEL
CONNECTED ONLY DURING
BOOTLOADING
RESISTOR
SERIES
Figure
RxD/PD0
(BEING USED
AS INPUT)
MC68HC11
5. The serial data
Application Note
293
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