MC68HC711E9CFN3 Freescale Semiconductor, MC68HC711E9CFN3 Datasheet - Page 202

• Manufacturer Part Number: MC68HC711E9CFN3
• Description: IC MCU 3MHZ 12K OTP 52-PLCC
• Manufacturer: Freescale Semiconductor
• Series: HC11r

Specifications of MC68HC711E9CFN3

• Core Processor: HC11
• Core Size: 8-Bit
• Speed: 3MHz
• Connectivity: SCI, SPI
• Peripherals: POR, WDT
• Number Of I /o: 38
• Program Memory Size: 12KB (12K x 8)
• Program Memory Type: OTP
• Eeprom Size: 512 x 8
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 52-PLCC
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Timing System
9.6.3 Pulse Accumulator Control Register
Technical Data
202
Address:
Bits RTR[1:0] of this register select the rate for the RTI system. The
remaining bits control the pulse accumulator and IC4/OC5 functions.
DDRA7 — Data Direction for Port A Bit 7
PAEN — Pulse Accumulator System Enable Bit
PAMOD — Pulse Accumulator Mode Bit
PEDGE — Pulse Accumulator Edge Control Bit
DDRA3 — Data Direction for Port A Bit 3
I4/O5 — Input Capture 4/Output Compare Bit
RTR[1:0] — RTI Interrupt Rate Select Bits
Reset:
Read:
Write:
Refer to
Refer to
Refer to
Refer to
Refer to
Refer to
These two bits determine the rate at which the RTI system requests
interrupts. The RTI system is driven by an E divided by 2
that is compensated so it is independent of the timer prescaler. These
two control bits select an additional division factor. Refer to
Figure 9-23. Pulse Accumulator Control Register (PACTL)
DDRA7
$1026
Bit 7
0
Section 6. Parallel Input/Output (I/O)
9.8 Pulse
9.8 Pulse
9.8 Pulse
Section 6. Parallel Input/Output (I/O)
9.8 Pulse
PAEN
Timing System
6
0
Accumulator.
Accumulator.
Accumulator.
Accumulator.
PAMOD
5
0
PEDGE
4
0
DDRA3
3
0
M68HC11E Family — Rev. 3.2
I4/O5
2
0
Ports.
Ports.
RTR1
13
1
0
Table
MOTOROLA
rate clock
RTR0
Bit 0
0
9-5.