MC68332ACFC25 Freescale Semiconductor, MC68332ACFC25 Datasheet - Page 254

• Manufacturer Part Number: MC68332ACFC25
• Description: IC MCU 32BIT 25MHZ 132-PQFP
• Manufacturer: Freescale Semiconductor
• Series: M683xxr

Specifications of MC68332ACFC25

• Core Processor: CPU32
• Core Size: 32-Bit
• Speed: 25MHz
• Connectivity: EBI/EMI, SCI, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 15
• Program Memory Type: ROMless
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 132-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

D-40
QUEUE RAM
QUEUE RAM
Access
Access
S/U
S/U
S/U
S/U
S/U
S/U
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
Channel
Number
Table D-7 MC68332 Module Address Map (Continued)
10
11
12
13
14
15
$FFFD20–
$FFFD40–
0
1
2
3
4
5
6
7
8
9
$FFFD3F
$FFFD4F
$FFFE0A
$FFFE0C
$FFFE0E
$FFFE1A
$FFFE1C
$FFFE1E
$FFFE00
$FFFE02
$FFFE04
$FFFE06
$FFFE08
$FFFE10
$FFFE12
$FFFE14
$FFFE16
$FFFE18
$FFFE20
$FFFE22
$FFFE24
$FFFE26
Address
Address
Freescale Semiconductor, Inc.
For More Information On This Product,
$FFFFF##
$FFFFF##
$FFFFF##
$FFFFF##
$FFFFF##
$FFFFF##
$FFFFF##
$FFFFF##
$FFFFF##
$FFFFF##
$FFFFF##
$FFFFF##
$FFFFF##
$FFFFF##
$FFFFF##
$FFFFF##
Address
15 8
15 8
Base
Go to: www.freescale.com
DEVELOPMENT SUPPORT CONTROL REGISTER (DSCR)
CHANNEL FUNCTION SELECTION REGISTER 0 (CFSR0)
CHANNEL FUNCTION SELECTION REGISTER 1 (CFSR1)
CHANNEL FUNCTION SELECTION REGISTER 2 (CFSR2)
CHANNEL FUNCTION SELECTION REGISTER 3 (CFSR3)
(Assumes SIMCR MM = 1)
DEVELOPMENT SUPPORT STATUS REGISTER (DSSR)
REGISTER SUMMARY
TPU MODULE CONFIGURATION REGISTER (TPUMCR)
TPU INTERRUPT CONFIGURATION REGISTER (TICR)
DECODED CHANNEL NUMBER REGISTER (DCNR)
TPU Parameter RAM
CHANNEL INTERRUPT ENABLE REGISTER (CIER)
CHANNEL INTERRUPT STATUS REGISTER (CISR)
HOST SERVICE REQUEST REGISTER 0 (HSRR0)
HOST SERVICE REQUEST REGISTER 1 (HSRR1)
SERVICE GRANT LATCH REGISTER (SGLR)
A0
B0
C0
D0
E0
F0
00
10
20
30
40
50
60
70
80
90
TEST CONFIGURATION REGISTER (TCR)
CHANNEL PRIORITY REGISTER 0 (CPR0)
CHANNEL PRIORITY REGISTER 1 (CPR1)
0
HOST SEQUENCE REGISTER 0 (HSQR0)
HOST SEQUENCE REGISTER 1 (HSQR1)
QSM
TPU
A2
B2
C2
D2
E2
02
12
22
32
42
52
62
72
82
92
F2
1
COMMAND RAM (CR[0:F])
TRANSMIT RAM (TR[0:F])
LINK REGISTER (LR)
A4
B4
C4
D4
E4
04
14
24
34
44
54
64
74
84
94
F4
2
Parameter
A6
B6
C6
D6
E6
06
16
26
36
46
56
66
76
86
96
F6
3
7 0
7 0
A8
B8
C8
D8
E8
08
18
28
38
48
58
68
78
88
98
F8
4
CA
DA
0A
1A
2A
3A
4A
5A
6A
7A
8A
9A
AA
BA
EA
FA
5
EC
FC
—
—
—
—
—
—
—
—
—
—
—
—
—
—
6
USER’S MANUAL
EE
FE
—
—
—
—
—
—
—
—
—
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—
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7
MC68332