MC68332ACFC25 Freescale Semiconductor, MC68332ACFC25 Datasheet - Page 33

• Manufacturer Part Number: MC68332ACFC25
• Description: IC MCU 32BIT 25MHZ 132-PQFP
• Manufacturer: Freescale Semiconductor
• Series: M683xxr

Specifications of MC68332ACFC25

• Core Processor: CPU32
• Core Size: 32-Bit
• Speed: 25MHz
• Connectivity: EBI/EMI, SCI, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 15
• Program Memory Type: ROMless
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 132-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

3.5.3 Base Address Registers
CSBARBT — Chip-Select Base Address Register Boot ROM
CSBAR[10:0] —Chip-Select Base Address Registers
ADDR[23:11] — Base Address Field
BLKSZ — Block Size Field
3.5.4 Option Registers
MC68332
MC68332TS/D
RESET:
RESET:
ADDR
ADDR
15
23
15
23
0
0
A base address is the starting address for the block enabled by a given chip select. Block size deter-
mines the extent of the block above the base address. Each chip select has an associated base register
so that an efficient address map can be constructed for each application. If a chip-select base address
register is programmed with the same address as a microcontroller module or memory array, an access
to that address goes to the module or array and the chip-select signal is not asserted.
This field sets the starting address of a particular address space. The address compare logic uses only
the most significant bits to match an address within a block. The value of the base address must be a
multiple of block size. Base address register diagrams show how base register bits correspond to ad-
dress lines.
This field determines the size of the block that must be enabled by the chip select. The following table
shows bit encoding for the base address registers block size field.
The option registers contain eight fields that determine timing of and conditions for assertion of chip-
select signals. For a chip-select signal to be asserted, all bits in the base address register must match
the corresponding internal upper address lines, and all conditions specified in the option register must
be satisfied. These conditions also apply to providing DSACK or autovector support.
ADDR
ADDR
14
22
14
22
0
0
ADDR
ADDR
13
21
13
21
0
0
Block Size Field
ADDR
ADDR
12
20
12
20
0
0
000
001
010
011
100
101
110
111
Freescale Semiconductor, Inc.
ADDR
ADDR
11
19
11
19
0
For More Information On This Product,
0
ADDR
ADDR
10
18
10
18
0
0
Go to: www.freescale.com
ADDR
ADDR
17
17
0
9
0
9
Block Size
128 K
256 K
512 K
16 K
64 K
1 M
2 K
8 K
ADDR
ADDR
16
16
0
8
0
8
ADDR
ADDR
15
15
0
7
0
7
Address Lines Compared
ADDR
ADDR
14
14
0
6
0
6
ADDR[23:11]
ADDR[23:13]
ADDR[23:14]
ADDR[23:16]
ADDR[23:17]
ADDR[23:18]
ADDR[23:19]
ADDR[23:20]
ADDR
ADDR
13
13
0
5
0
5
ADDR
ADDR
12
12
0
4
0
4
ADDR
ADDR
11
11
0
3
0
3
$YFFA4C–$YFFA74
0
2
1
2
MOTOROLA
BLKSZ
BLKSZ
0
$YFFA48
1
0
0
1
0
33