MC68HC908GR16VFJ Freescale Semiconductor, MC68HC908GR16VFJ Datasheet - Page 129

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MC68HC908GR16VFJ

Manufacturer Part Number
MC68HC908GR16VFJ
Description
IC MCU 16K FLASH 8MHZ SPI 32LQFP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet

Specifications of MC68HC908GR16VFJ

Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
LIN, SCI, SPI
Peripherals
LVD, POR, PWM
Number Of I /o
21
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
32-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

Available stocks

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Quantity
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Part Number:
MC68HC908GR16VFJ
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
When bit DDRCx is a 1, reading address $0002 reads the PTCx data latch. When bit DDRCx is a 0,
reading address $0002 reads the voltage level on the pin. The data latch can always be written,
regardless of the state of its data direction bit.
12.4.3 Port C Input Pullup Enable Register
The port C input pullup enable register (PTCPUE) contains a software configurable pullup device for each
of the port C pins. Each bit is individually configurable and requires that the data direction register, DDRC,
bit be configured as an input. Each pullup is automatically and dynamically disabled when a port bit’s
DDRC is configured for output mode.
Freescale Semiconductor
1. X = Don’t care
2. I/O pin pulled up to V
3. Writing affects data register, but does not affect input.
4. Hi-Z = High impedance
PTCPUE
Bit
1
0
X
Address:
DDRC
Reset:
Read:
Write:
Bit
0
0
1
Figure 12-12. Port C Input Pullup Enable Register (PTCPUE)
DD
READ DDRC ($0006)
WRITE DDRC ($0006)
WRITE PTC ($0002)
READ PTC ($0002)
PTCPUEx
$000E
Bit 7
by internal pullup device.
PTC
0
0
X
Bit
X
X
(1)
= Unimplemented
PTCPUE6
Input, Hi-Z
Input, V
6
0
RESET
Table 12-4. Port C Pin Functions
I/O Pin
Output
MC68HC908GR16 Data Sheet, Rev. 5.0
Mode
Figure 12-11. Port C I/O Circuit
DD
PTCPUE5
V
DD
INTERNAL
PULLUP
DEVICE
(2)
(4)
5
0
Table 12-4
PTCPUE4
DDRCx
Accesses to DDRC
PTCx
DDRC6–DDRC0
DDRC6–DDRC0
DDRC6–DDRC0
4
0
Read/Write
PTCPUE3
summarizes the operation of the port C pins.
3
0
PTCPUE2
2
0
PTC6–PTC0
Read
PTCPUE1
Pin
Pin
1
0
Accesses to PTC
PTCPUE0
PTCx
Bit 0
0
PTC6–PTC0
PTC6–PTC0
PTC6–PTC0
Write
Port C
(3)
(3)
129

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