C8051F019 Silicon Laboratories Inc, C8051F019 Datasheet - Page 25
![IC 8051 MCU 16K FLASH 48TQFP](/photos/15/92/159280/tqfp-48_sml.jpg)
C8051F019
Manufacturer Part Number
C8051F019
Description
IC 8051 MCU 16K FLASH 48TQFP
Manufacturer
Silicon Laboratories Inc
Series
C8051F018r
Specifications of C8051F019
Core Processor
8051
Core Size
8-Bit
Speed
25MHz
Connectivity
SMBus (2-Wire/I²C), SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
Number Of I /o
16
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
1.25K x 8
Voltage - Supply (vcc/vdd)
2.8 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-TQFP, 48-VQFP
Data Bus Width
8 bit
Data Ram Size
1.25 KB
Interface Type
I2C, SMBus, SPI, UART
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
16
Number Of Timers
16 bit
Operating Supply Voltage
2.8 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Lead Free Status / Rohs Status
No
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
C8051F019
Manufacturer:
Silicon Laboratories Inc
Quantity:
10 000
Company:
Part Number:
C8051F019-GQ
Manufacturer:
Silicon Laboratories Inc
Quantity:
10 000
Company:
Part Number:
C8051F019-GQR
Manufacturer:
Silicon Laboratories Inc
Quantity:
10 000
Company:
Part Number:
C8051F019R
Manufacturer:
Silicon Laboratories Inc
Quantity:
10 000
5. ADC
The ADC subsystem consists of a 9-channel configurable analog multiplexer (AMUX) and a 100ksps, 10-bit
successive-approximation-register ADC with integrated track-and-hold and programmable window detector (see
block diagram in Figure 5.1).
configurable under software control via the Special Function Register’s shown in Figure 5.1. The ADC subsystem
(ADC, track-and-hold and PGA) is enabled only when the ADCEN bit in the ADC Control register (ADC0CN,
Figure 5.7) is set to 1. The ADC subsystem is in low power shutdown when this bit is 0. The Bias Enable bit
(BIASE) in the REF0CN register (see Figure 7.2) must be set to 1 in order to supply bias to the ADC.
5.1.
Figure 5.3). AMUX input pairs can be programmed to operate in either the differential or single-ended mode. This
allows the user to select the best measurement technique for each input channel, and even accommodates mode
changes “on-the-fly”. The AMUX defaults to all single-ended inputs upon reset. There are two registers associated
with the AMUX: the Channel Selection register AMX0SL (Figure 5.5), and the Configuration register AMX0CF
(Figure 5.4). The table in Figure 5.5 shows AMUX functionality by channel for each possible configuration.
25
Eight of the AMUX channels are available for external measurements while the ninth channel is internally
C8051F018
C8051F019
AIN0
AIN1
AIN2
AIN3
AIN4
AIN5
AIN6
AIN7
Analog Multiplexer
connected to an on-board temperature sensor (temperature transfer function is shown in
SENSOR
AGND
TEMP
AMX0CF
ADC0GTH
+
+
+
+
-
-
-
-
AMUX
(SE or
9-to-1
DIFF)
Figure 5.1. 10-Bit ADC Functional Block Diagram
The AMUX, PGA, Data Conversion Modes, and Window Detector are all
AMX0SL
ADC0GTL
Rev. 1.2
ADC0CF
ADC0LTH
ADCEN
ADC
10-Bit
AV+
SAR
ADC0CN
ADC0LTL
10
20
10
COMB
LOGIC
ADWINT