C8051F331 Silicon Laboratories Inc, C8051F331 Datasheet - Page 105
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C8051F331
Manufacturer Part Number
C8051F331
Description
IC 8051 MCU 8K FLASH 20MLP
Manufacturer
Silicon Laboratories Inc
Series
C8051F33xr
Datasheet
1.C8051F330R.pdf
(208 pages)
Specifications of C8051F331
Core Processor
8051
Core Size
8-Bit
Speed
25MHz
Connectivity
SMBus (2-Wire/I²C), SPI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
17
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
20-QFN
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Data Converters
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
C8051F331
Manufacturer:
SILICON LABS/芯科
Quantity:
20 000
Company:
Part Number:
C8051F331-GM
Manufacturer:
SiliconL
Quantity:
1 630
Part Number:
C8051F331-GM
Manufacturer:
SILICON LABS/芯科
Quantity:
20 000
Part Number:
C8051F331-GMR
Manufacturer:
SILICON LABS/芯科
Quantity:
20 000
13.2. Programmable Internal Low-Frequency (L-F) Oscillator
All C8051F330/1, C8051F330D devices include a programmable low-frequency internal oscillator, which is
calibrated to a nominal frequency of 80 kHz. The low-frequency oscillator circuit includes a divider that can
be changed to divide the clock by 1, 2, 4, or 8, using the OSCLD bits in the OSCLCN register (see
Figure 13.4). Additionally, the OSCLF bits (OSCLCN5:2) can be used to adjust the oscillator’s output fre-
quency.
13.2.1. Calibrating the Internal L-F Oscillator
Timers 2 and 3 include capture functions that can be used to capture the oscillator frequency, when run-
ning from a known time base. When either Timer 2 or Timer 3 is configured for L-F Oscillator Capture
Mode, a falling edge (Timer 2) or rising edge (Timer 3) of the low-frequency oscillator’s output will cause a
capture event on the corresponding timer. As a capture event occurs, the current timer value
(TMRnH:TMRnL) is copied into the timer reload registers (TMRnRLH:TMRnRLL). By recording the differ-
ence between two successive timer capture values, the low-frequency oscillator’s period can be calcu-
lated. The OSCLF bits can then be adjusted to produce the desired oscillator frequency.
Bit7:
Bit6:
Bits5-2:
Bits1-0:
OSCLEN OSCLRDY OSCLF3
R/W
Bit7
OSCLEN: Internal L-F Oscillator Enable.
0: Internal L-F Oscillator Disabled.
1: Internal L-F Oscillator Enabled.
OSCLRDY: Internal L-F Oscillator Ready.
0: Internal L-F Oscillator frequency not stabilized.
1: Internal L-F Oscillator frequency stabilized.
OSCLF[3:0]: Internal L-F Oscillator Frequency Control bits.
Fine-tune control bits for the Internal L-F oscillator frequency. When set to 0000b, the L-F
oscillator operates at its fastest setting. When set to 1111b, the L-F oscillator operates at its
slowest setting.
OSCLD[1:0]: Internal L-F Oscillator Divider Select.
00: Divide by 8 selected.
01: Divide by 4 selected.
10: Divide by 2 selected.
11: Divide by 1 selected.
Bit6
R
Figure 13.4. OSCLCN: Internal L-F Oscillator Control Register
R/W
Bit5
OSCLF2
R/W
Bit4
C8051F330/1, C8051F330D
OSCLF1
Rev. 1.2
R/W
Bit3
OSCLF0
R/W
Bit2
OSCLD1 OSCLD0
R/W
Bit1
R/W
Bit0
SFR Address:
Reset Value
00vvvv00
0xE3
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