C8051F331 Silicon Laboratories Inc, C8051F331 Datasheet - Page 43
C8051F331
Manufacturer Part Number
C8051F331
Description
IC 8051 MCU 8K FLASH 20MLP
Manufacturer
Silicon Laboratories Inc
Series
C8051F33xr
Datasheet
1.C8051F330R.pdf
(208 pages)
Specifications of C8051F331
Core Processor
8051
Core Size
8-Bit
Speed
25MHz
Connectivity
SMBus (2-Wire/I²C), SPI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
17
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
20-QFN
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Data Converters
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
C8051F331
Manufacturer:
SILICON LABS/芯科
Quantity:
20 000
Company:
Part Number:
C8051F331-GM
Manufacturer:
SiliconL
Quantity:
1 630
Part Number:
C8051F331-GM
Manufacturer:
SILICON LABS/芯科
Quantity:
20 000
Part Number:
C8051F331-GMR
Manufacturer:
SILICON LABS/芯科
Quantity:
20 000
Bits7-3:
Bit2:
Bits1-0:
Bits7-0:
Bits7-0:
AD0SC4
R/W
R/W
R/W
Bit7
Bit7
Bit7
AD0SC4-0: ADC0 SAR Conversion Clock Period Bits.
SAR Conversion clock is derived from system clock by the following equation, where
AD0SC refers to the 5-bit value held in bits AD0SC4-0. SAR Conversion clock requirements
are given in Table 5.1.
AD0LJST: ADC0 Left Justify Select.
0: Data in ADC0H:ADC0L registers are right-justified.
1: Data in ADC0H:ADC0L registers are left-justified.
UNUSED. Read = 00b; Write = don’t care.
ADC0 Data Word High-Order Bits.
For AD0LJST = 0: Bits 7-2 are the sign extension of Bit1. Bits 1-0 are the upper 2 bits of the
10-bit ADC0 Data Word.
For AD0LJST = 1: Bits 7-0 are the most-significant bits of the 10-bit ADC0 Data Word.
ADC0 Data Word Low-Order Bits.
For AD0LJST = 0: Bits 7-0 are the lower 8 bits of the 10-bit Data Word.
For AD0LJST = 1: Bits 7-6 are the lower 2 bits of the 10-bit Data Word. Bits 5-0 will always
read ‘0’.
AD0SC
AD0SC3
R/W
R/W
R/W
Bit6
Bit6
Bit6
=
SYSCLK
--------------------- - 1
CLK
Figure 5.8. ADC0H: ADC0 Data Word MSB Register
AD0SC2
Figure 5.7. ADC0CF: ADC0 Configuration Register
Figure 5.9. ADC0L: ADC0 Data Word LSB Register
R/W
R/W
R/W
Bit5
Bit5
Bit5
SAR
–
AD0SC1
R/W
R/W
R/W
Bit4
Bit4
Bit4
AD0SC0 AD0LJST
C8051F330/1, C8051F330D
Rev. 1.2
R/W
R/W
R/W
Bit3
Bit3
Bit3
R/W
R/W
R/W
Bit2
Bit2
Bit2
R/W
R/W
Bit1
Bit1
Bit1
R
-
R/W
R/W
Bit0
Bit0
Bit0
R
-
SFR Address:
SFR Address:
SFR Address:
00000000
Reset Value
Reset Value
00000000
11111000
Reset Value
0xBC
0xBE
0xBD
43