C8051F331 Silicon Laboratories Inc, C8051F331 Datasheet - Page 71

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C8051F331

Manufacturer Part Number
C8051F331
Description
IC 8051 MCU 8K FLASH 20MLP
Manufacturer
Silicon Laboratories Inc
Series
C8051F33xr
Datasheet

Specifications of C8051F331

Core Processor
8051
Core Size
8-Bit
Speed
25MHz
Connectivity
SMBus (2-Wire/I²C), SPI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
17
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
20-QFN
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Data Converters
-

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0
9.2.
The memory organization of the CIP-51 System Controller is similar to that of a standard 8051. There are
two separate memory spaces: program memory and data memory. Program and data memory share the
same address space but are accessed via different instruction types. The CIP-51 memory organization is
shown in Figure 9.2
9.2.1. Program Memory
The CIP-51 core has a 64k-byte program memory space. The C8051F330/1, C8051F330D implements 8k
bytes of this program memory space as in-system, re-programmable Flash memory, organized in a contig-
uous block from addresses 0x0000 to 0x1DFF. Addresses above 0x1DFF are reserved.
Program memory is normally assumed to be read-only. However, the CIP-51 can write to program memory
by setting the Program Store Write Enable bit (PSCTL.0) and using the MOVX write instruction. This fea-
ture provides a mechanism for the CIP-51 to update program code and use the program memory space for
non-volatile data storage. Refer to
0x1DFF
0x1FFF
0x1E00
Memory Organization
0x0000
PROGRAM/DATA MEMORY
Programmable in 512
Byte Sectors)
RESERVED
(In-System
8K FLASH
(FLASH)
Section “11. Flash Memory” on page 95
Figure 9.2. Memory Map
0xFFFF
0x01FF
0x0200
0x0000
0xFF
0x80
0x7F
0x30
0x2F
0x20
0x1F
0x00
C8051F330/1, C8051F330D
Rev. 1.2
0x0000 to 0x01FF, wrapped
XRAM - 512 Bytes
(accessable using MOVX
Same 512 bytes as from
(Indirect Addressing
on 512-byte boundaries
(Direct and Indirect
EXTERNAL DATA ADDRESS SPACE
INTERNAL DATA ADDRESS SPACE
General Purpose
Upper 128 RAM
Bit Addressable
Addressing)
instruction)
Registers
Only)
DATA MEMORY (RAM)
(Direct Addressing Only)
for further details.
Special Function
Lower 128 RAM
(Direct and Indirect
Addressing)
Register's
71

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