C8051F350 Silicon Laboratories Inc, C8051F350 Datasheet - Page 119

IC 8051 MCU 8K FLASH 32LQFP

C8051F350

Manufacturer Part Number
C8051F350
Description
IC 8051 MCU 8K FLASH 32LQFP
Manufacturer
Silicon Laboratories Inc
Series
C8051F35xr
Datasheets

Specifications of C8051F350

Core Processor
8051
Core Size
8-Bit
Speed
50MHz
Connectivity
SMBus (2-Wire/I²C), SPI, UART/USART
Peripherals
POR, PWM, Temp Sensor, WDT
Number Of I /o
17
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x24b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
32-LQFP
Data Bus Width
8 bit
Data Rom Size
128 B
On-chip Adc
10 bit
Number Of Timers
16 bit
Operating Supply Voltage
2.7 V to 3.6 V
Mounting Style
SMD/SMT
Height
1.4 mm
Length
7 mm
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Width
7 mm
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Lead Free Status / Rohs Status
No RoHS Version Available

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15.2. Non-volatile Data Storage
The Flash memory can be used for non-volatile data storage as well as program code. This allows data
such as calibration coefficients to be calculated and stored at run time. Data is written using the MOVX
write instruction and read using the MOVC instruction. Note: MOVX read instructions always target XRAM.
15.3. Security Options
The CIP-51 provides security options to protect the Flash memory from inadvertent modification by soft-
ware as well as to prevent the viewing of proprietary program code and constants. The Program Store
Write Enable (bit PSWE in register PSCTL) and the Program Store Erase Enable (bit PSEE in register
PSCTL) bits protect the Flash memory from accidental modification by software. PSWE must be explicitly
set to ‘1’ before software can modify the Flash memory; both PSWE and PSEE must be set to ‘1’ before
software can erase Flash memory. Additional security features prevent proprietary program code and data
constants from being read or altered across the C2 interface.
A Security Lock Byte located at the last byte of Flash user space offers protection of the Flash program
memory from access (reads, writes, or erases) by unprotected code or the C2 interface. The Flash security
mechanism allows the user to lock n 512-byte Flash pages, starting at page 0 (addresses 0x0000 to
0x01FF), where n is the 1’s complement number represented by the Security Lock Byte. Note that the
page containing the Flash Security Lock Byte is locked when any other Flash pages are locked. See exam-
ple below.
Important Notes About the Flash Security:
Flash pages locked:
Security Lock Byte:
Addresses locked:
1’s Complement:
1. Clearing any bit of the Lock Byte to ‘0’ will lock the Flash page containing the Lock Byte (in
2. Locked pages cannot be read, written, or erased via the C2 interface.
3. Locked pages cannot be read, written, or erased by user firmware executing from unlocked
4. User firmware executing in a locked page may read and write Flash memory in any locked or
5. User firmware executing in a locked page may erase Flash memory in any locked or unlocked
6. Locked pages can only be unlocked by a C2 Device Erase command.
7. If a user firmware Flash access attempt is denied (per restrictions #3, #4, and #5 above), a
addition to the selected pages).
memory space.
unlocked page excluding the reserved area.
page excluding the reserved area and the page containing the Lock Byte.
Flash Error system reset will be generated.
0x0000 to 0x03FF (first two Flash pages) and
3 (First two Flash pages + Lock Byte Page)
0x1C00 to 0x1DFF (Lock Byte Page)
Rev. 0.4
00000010b
11111101b
C8051F350/1/2/3
119

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