C8051F351 Silicon Laboratories Inc, C8051F351 Datasheet - Page 123
C8051F351
Manufacturer Part Number
C8051F351
Description
IC 8051 MCU 8K FLASH 28MLP
Manufacturer
Silicon Laboratories Inc
Series
C8051F35xr
Specifications of C8051F351
Core Processor
8051
Core Size
8-Bit
Speed
50MHz
Connectivity
SMBus (2-Wire/I²C), SPI, UART/USART
Peripherals
POR, PWM, Temp Sensor, WDT
Number Of I /o
17
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x24b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Available stocks
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Manufacturer
Quantity
Price
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Part Number:
C8051F351-GM
Manufacturer:
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16.
The C8051F350/1/2/3 devices include 512 bytes of RAM mapped into the external data memory space. All
of these address locations may be accessed using the external move instruction (MOVX) and the data
pointer (DPTR), or using MOVX indirect addressing mode. If the MOVX instruction is used with an 8-bit
address operand (such as @R1), then the high byte of the 16-bit address is provided by the External Mem-
ory Interface Control Register (EMI0CN as shown in Figure 16.1). Note: the MOVX instruction is also used
for writes to the Flash memory. See
instruction accesses XRAM by default.
For a 16-bit MOVX operation (@DPTR), the upper 6-bits of the 16-bit external data memory address word
are "don't cares". As a result, the 512-byte RAM is mapped modulo style over the entire 64 k external data
memory address range. For example, the XRAM byte at address 0x0000 is shadowed at addresses
0x0200, 0x0400, 0x0600, 0x0800, etc. This is a useful feature when performing a linear memory fill, as the
address pointer doesn't have to be reset when reaching the RAM block boundary.
Bits 7-1: UNUSED. Read = 0000000b. Write = don’t care.
Bit 0:
R/W
Bit7
-
External RAM
PGSEL: XRAM Page Select.
The EMI0CN register provides the high byte of the 16-bit external data memory address
when using an 8-bit MOVX command, effectively selecting a 256-byte page of RAM. Since
the upper (unused) bits of the register are always zero, the PGSEL determines which page
of XRAM is accessed.
For Example: If EMI0CN = 0x01, addresses 0x0100 through 0x01FF will be accessed.
Figure 16.1. EMI0CN: External Memory Interface Control
R/W
Bit6
-
R/W
Bit5
-
Section “15. Flash Memory” on page 117
R/W
Bit4
-
Rev. 0.4
R/W
Bit3
-
R/W
Bit2
-
C8051F350/1/2/3
R/W
Bit1
-
SFR Address:
for details. The MOVX
PGSEL
R/W
Bit0
0xAA
00000000
Reset Value
123
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